基本情報

学位
工学博士(1974年3月 大阪大学)

J-GLOBAL ID
200901084098518174
researchmap会員ID
1000165720

外部リンク

Technical Biography
Hideo Fujiwara received the B.E., M.E., and Ph.D. degrees in electronic engineering from Osaka University, Osaka, Japan, in 1969, 1971, and 1974, respectively. He was with Osaka University from 1974 to 1985, Meiji University from 1985 to 1993, Nara Institute of Science and Technology (NAIST) from 1993 to 2011, and Osaka Gakuin University from 2011 to 2021. Presently he is Professor Emeritus of NAIST.
His research interests are logic design, digital systems design and test, VLSI CAD and fault tolerant computing, including high-level/logic synthesis for testability, test synthesis, design for testability, built-in self-test, test pattern generation, parallel processing, and computational complexity. He has published over 400 papers in refereed journals and conferences, and nine books including the book from the MIT Press (1985) entitled “Logic Testing and Design for Testability.” He received the IECE Young Engineer Award in 1977, IEEE Computer Society Certificate of Appreciation Awards in 1991, 2000 and 2001, Okawa Prize for Publication in 1994, IEEE Computer Society Meritorious Service Awards in 1996 and 2005, IEEE Computer Society Continuing Service Award in 2005, IEEE Computer Society Outstanding Contribution Award in 2001, 2009 and 2016, IEEE Computer Society TTTC ATS Most Contribution Author Award in 2016, and IEEE TTTC Lifetime Contribution Medal in 2020.
He served as an Editor of the IEEE Trans. on Computers (1998-2002), Journal of Electronic Testing: Theory and Application (1989-2004), Journal of Circuits, Systems and Computers (1989-2004), VLSI Design: An Application Journal of Custom-Chip Design, Simulation, and Testing (1992-2005), and several guest editors of special issues of IEICE Transactions of Information and Systems. Dr. Fujiwara is a life fellow of the IEEE, a Golden Core member of the IEEE Computer Society, a life fellow of the IEICE (the Institute of Electronics, Information and Communication Engineers of Japan) and a life fellow of the IPSJ (the Information Processing Society of Japan).


研究キーワード

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委員歴

  28

受賞

  52

論文

  65

MISC

  682

Works(作品等)

  27