Apr, 2016 - Mar, 2020
LSI Design Method for Minimum Energy Operation
Japan Society for the Promotion of Science Grants-in-Aid for Scientific Research Grant-in-Aid for Scientific Research (A) Grant-in-Aid for Scientific Research (A)
- Grant number
- 16H01713
- Japan Grant Number (JGN)
- JP16H01713
- Grant amount
-
- (Total)
- 41,470,000 Japanese Yen
- (Direct funding)
- 31,900,000 Japanese Yen
- (Indirect funding)
- 9,570,000 Japanese Yen
We have developed a method for deriving a set of supply voltage and threshold voltage that enables the circuit to operate at the minimum energy consumption under a wide range of operating conditions and a specified delay constraint. We experimentally confirmed using a fabricated 32-bit processor that the derived set of supply voltage and threshold voltage can operate the circuit with less than 5 % excess energy from the minimum energy consumption under a wide variety of delay constraints and operating conditions. We also developed a DLL-type body bias generator that generate P/N well-voltages independently so that the energy consumption becomes minimum, which was verified by fabricated test chips.
- Link information
- ID information
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- Grant number : 16H01713
- Japan Grant Number (JGN) : JP16H01713