2014 IEEE International Conference on High Performance Computing and Communications, 6th IEEE International Symposium on Cyberspace Safety and Security, 11th IEEE International Conference on Embedded Software and Systems, HPCC/CSS/ICESS 2014, Paris, Franc 546-549 2014 [Refereed]
Sixth IEEE International Symposium on Electronic Design, Test and Application, DELTA 2011, Queenstown, New Zealand, 17-19 January, 2011 19-24 2011 [Refereed]
Proceedings of the 2010 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2010, Scottsdale, AZ, USA, October 24-29, 2010 157-166 2010 [Refereed]
Technical report of IEICE. VLD 114(328) 63-68 Nov 2014
Recently, single instruction set heterogeneous multi-core architecture have focused attention for use in embedded systems. In order to reduce energy consumption on this architecture, while guaranteeing the deadline constraints of embedded real-tim...
IEICE technical report. Dependable computing 114(329) 63-68 Nov 2014
Recently, single instruction set heterogeneous multi-core architecture have focused attention for use in embedded systems. In order to reduce energy consumption on this architecture, while guaranteeing the deadline constraints of embedded real-tim...
IEICE technical report. Dependable computing 113(498) 211-216 Mar 2014
LED-Camp is a study camp for young embedded system engineers. The participator consists of undergraduate students, graduate students, and engineers who work within three years. The target of this camp is that they learn the basic techniques of emb...
IEICE technical report. Computer systems 113(497) 211-216 Mar 2014
LED-Camp is a study camp for young embedded system engineers. The participator consists of undergraduate students, graduate students, and engineers who work within three years. The target of this camp is that they learn the basic techniques of emb...
IEICE technical report. Computer systems 113(497) 91-96 Mar 2014
We have studied an environment which make it possible for designers to design systems based on programmable SoCs with only programming language for software. In this paper, we implement a front-end of our system design environment. In the front-en...
IEICE technical report. Dependable computing 113(498) 91-96 Mar 2014
We have studied an environment which make it possible for designers to design systems based on programmable SoCs with only programming language for software. In this paper, we implement a front-end of our system design environment. In the front-en...
IEICE technical report. Dependable computing 113(498) 1-6 Mar 2014
Energy harvesting embedded systems may work permanently when the chance to harvest energy is steady. However, operation strategies to utilize the limited energy are needed when the chance is not steady. In this report, we present an operation scen...
IEICE technical report. Computer systems 113(497) 1-6 Mar 2014
Energy harvesting embedded systems may work permanently when the chance to harvest energy is steady. However, operation strategies to utilize the limited energy are needed when the chance is not steady. In this report, we present an operation scen...
LED-Camp は，組込みシステム分野の若手技術者を対象とした合宿形式の勉強会である．学部および修士学生，また開発経験 3 年以内の社会人を対象として，組込みソフトウェア開発の技術および基礎知識を習得することを目指す．本企画には，モデル駆動開発やアジャイル開発といった，組込みソフトウェア開発に関する最新技術を体験できるところに特徴がある．本稿では，2013 年 8 月に実施した LED-Camp1 について報告するとともに，その教育効果を議論する．LED-Camp is a study ...
Technical report of IEICE. VLD 113(416) 191-196 Jan 2014
Recently, programmable SoCs which integrate a processor and an FPGA on one chip are released and attracting attentions. A programmable SoC can realize systems composed of various processes with different requirements of the load and flexibility. I...
LED-Camp は，組込みシステム分野の若手技術者を対象とした合宿形式の勉強会である．学部および修士学生，また開発経験 3 年以内の社会人を対象として，組込みソフトウェア開発の技術および基礎知識を習得することを目指す．本企画には，モデル駆動開発やアジャイル開発といった，組込みソフトウェア開発に関する最新技術を体験できるところに特徴がある．本稿では，2013 年 8 月に実施した LED-Camp1 について報告するとともに，その教育効果を議論する．LED-Camp is a study ...
IEICE technical report. Computer systems 113(417) 191-196 Jan 2014
Recently, programmable SoCs which integrate a processor and an FPGA on one chip are released and attracting attentions. A programmable SoC can realize systems composed of various processes with different requirements of the load and flexibility. I...
Recently, programmable SoCs which integrate a processor and an FPGA on one chip are released and attracting attentions. A programmable SoC can realize systems composed of various processes with different requirements of the load and flexibility. I...
SUDA AKIHIRO, TAKASE HIDEKI, TAKAGI KAZUYOSHI, TAKAGI NAOFUMI
Technical report of IEICE. VLD 113(320) 251-256 Nov 2013
Recently, polyhedral optimization has been focused as an automatic parallelization method for nested loops with non-uniform data dependencies. However, off-chip RAM accesses have been the bottleneck for applying polyhedral optimization into high-l...
SUDA AKIHIRO, TAKASE HIDEKI, TAKAGI KAZUYOSHI, TAKAGI NAOFUMI
IEICE technical report. Dependable computing 113(321) 251-256 Nov 2013
Recently, polyhedral optimization has been focused as an automatic parallelization method for nested loops with non-uniform data dependencies. However, off-chip RAM accesses have been the bottleneck for applying polyhedral optimization into high-l...
IEICE technical report. Computer systems 112(481) 253-258 Mar 2013
A floating-point unit array that is constructed by connecting floating-point units, is expected to be an excellent architecture for calculating a huge amount of operation in scientific computation such as signal and image processing. In this paper...
IEICE technical report. Dependable computing 112(321) 99-104 Nov 2012
It is important to ensure the parallelism of the synthesized circuits in high level synthesis, where digital designs are synthesized from their behavioral descriptions. In this report, we focus on indefinite loops whose number of iterations are de...
Technical report of IEICE. VLD 112(320) 99-104 Nov 2012
It is important to ensure the parallelism of the synthesized circuits in high level synthesis, where digital designs are synthesized from their behavioral descriptions. In this report, we focus on indefinite loops whose number of iterations are de...
SUDA AKIHIRO, TAKASE HIDEKI, TAKAGI KAZUYOSHI, TAKAGI NAOFUMI
IEICE technical report. Computer systems 112(481) 121-126 Mar 2013
In the field of high level synthesis, there has been an issue on automatic extraction of parallelism. Recently, automatic parallelization methods called Polyhedral Optimization are attracting attention in the field of software compilation. Polyhed...
IEICE technical report. Dependable computing 112(482) 253-258 Mar 2013
A floating-point unit array that is constructed by connecting floating-point units, is expected to be an excellent architecture for calculating a huge amount of operation in scientific computation such as signal and image processing. In this paper...
The authors developed two types of human resource development program consisting of a) one-year collaborative research project, and b) open education course, aimed to train embedded software engineers to high technical standards. In the collaborat...
SUDA AKIHIRO, TAKASE HIDEKI, TAKAGI KAZUYOSHI, TAKAGI NAOFUMI
IEICE technical report. Dependable computing 112(482) 121-126 Mar 2013
In the field of high level synthesis, there has been an issue on automatic extraction of parallelism. Recently, automatic parallelization methods called Polyhedral Optimization are attracting attention in the field of software compilation. Polyhed...
IPSJ Transactions on System LSI Design Methodology 5(0) 133-142 2012
A dynamic energy performance scaling (DEPS) framework has been proposed as a generalization of dynamic voltage frequency scaling (DVFS). The DEPS framework selects an energy-optimal hardware configuration at runtime. To reduce runtime overhead, Pa...
IEICE technical report. Computer systems 111(461) 73-78 Feb 2012
In order to improve the efficiency of DVFS, it is important to properly distribute the slack time among tasks which is estimated by analyzing the task scheduling. In this paper, we proposed a method for slack time distribution called LFST (Levelin...
本論文では，組込みシステム技術に関する教育プログラムとして実施した「組込みシステム技術に関するサマースクール（Summer School on Embedded System Technologies: SSEST）」の取り組みについて述べる．SSESTは，さまざまなバックグラウンドを持つ参加者を想定して，実際の組込みシステムを各自で作成する事前実習と，コミュニケーション能力やドキュメンテーションの重要性を体験する合宿形式で実施されるグループ開発から構成される教育プログラムである．過去5年...
IEICE technical report. Dependable computing 111(462) 73-78 Feb 2012
In order to improve the efficiency of DVFS, it is important to properly distribute the slack time among tasks which is estimated by analyzing the task scheduling. In this paper, we proposed a method for slack time distribution called LFST (Levelin...
IEICE technical report. Dependable computing 111(325) 97-102 Nov 2011
The scratch-pad memory is a suitable on-chip memory for the embedded system in terms of its real-time predictability and energy efficiency. This paper proposes a runtime management mechanism for the efficient usage of the scratch-pad memory. We de...
Technical report of IEICE. VLD 111(324) 97-102 Nov 2011
The scratch-pad memory is a suitable on-chip memory for the embedded system in terms of its real-time predictability and energy efficiency. This paper proposes a runtime management mechanism for the efficient usage of the scratch-pad memory. We de...
The authors developed two types of human resource development program consisting of a) one-year collaborative research project, and b) open education course, aimed to train embedded software engineers to high technical standards. In the collaborat...
Proc Int Symp Low Power Electron Des 2011 271-276 Sep 2011
This paper presents a framework for the purpose of energy optimization of embedded real-time systems. We implemented the presented framework as an optimization toolchain and an energy-aware real-time operating system. Our framework is synthetic, t...
タスク内動的電圧・周波数制御 （DVFS: Dynamic Voltage and Frequency Scaling） による消費エネルギー削減効果を向上させるには，プログラム内の残り最悪実行サイクル数を正確に見積もることが重要である．さらに，周波数の切替えを行うチェックポイントを，適切に定める必要がある．本稿では，実行トレースマイニングによって見積もった残り最悪実行サイクル数から，DVFS に効果的な適切なチェックポイントを選定する手法を提案する．チェックポイントの選定には，グリーディ...
T. Tatematsu; H. Takase; G. Zeng; H. Tomiyama; H. Takada
Proceedings - 2011 6th IEEE International Symposium on Electronic Design, Test and Application, DELTA 2011 19-24 Apr 2011
It is important to estimate accurately the remaining worst case execution cycles in a program to improve the effect that intra-task dynamic voltage and frequency scaling (DVFS) has on energy reduction. Since checkpoints for DVFS involve execution ...
This paper reports activities for Summer School on Embedded System Technologies 4 (SSEST4) held on September in 2008. SSEST4 is an educational activity in embedded system technology. There are two characteristics of SSEST4. First, an executive com...
Energy consumption has become one of the major concerns in modern embedded systems. Recently memory subsystems have become consumed large amount of total energy in the embedded processors. This paper proposes partitioning and allocation approaches...
L. Gauthier; T. Ishihara; H. Takase; H. Tomiyama; H. Takada
Embedded Systems Week 2010 - Proceedings of the 2010 International Conference on Compilers, Architecture and Synthesis for Embedded Systems, CASES\\'10 157-166 Dec 2010
This paper presents a new technique for reducing the energy consumption of a multi-task system by sharing its scratch-pad memory (SPM) space among the tasks. With this technique, tasks can interfere by using common areas of the SPM. However, this ...
IEICE technical report. Computer systems 108(463) 7-12 Feb 2009
This paper reports activities for Summer School on Embedded System Technologies 4 (SSEST4) held on September in 2008. SSEST4 is an educational activity in embedded system technology. There are two characteristics of SSEST4. First, an executive com...
In this paper, we propose three approaches to allocation of scratch-pad memory for preemptive fixed-priority multi-task systems. These approaches can reduce energy consumption of instruction memory. Each approach is formulated as an integer progra...
IEICE technical report. Dependable computing 108(464) 7-12 Feb 2009
This paper reports activities for Summer School on Embedded System Technologies 4 (SSEST4) held on September in 2008. SSEST4 is an educational activity in embedded system technology. There are two characteristics of SSEST4. First, an executive com...
Proceedings -Design, Automation and Test in Europe, DATE 1124-1129 Jun 2010
Scratch-pad memory has been employed as a partial or entire replacement for cache memory due to its better energy efficiency. In this paper, we propose scratch-pad memory management techniques for priority-based preemptive multi-task systems. Our ...
情報処理学会研究報告. SLDM, [システムLSI設計技術] 139(22) 7-12 Feb 2009
This paper reports activities for Summer School on Embedded System Technologies 4 (SSEST4) held on September in 2008. SSEST4 is an educational activity in embedded system technology. There are two characteristics of SSEST4. First, an executive com...
H. Takase; T. Azumi; I. Taniguchi; Y. Matsubara; H. Kanai; S. Hosoai; M. Sugaya
Proceedings - 2009 Workshop on Embedded Systems Education, WESE 2009 19-26 Dec 2009
This paper reports an embedded educational activity named Summer School on Embedded System Technologies (SSEST) in Japan. We, the committee members made up of students and young engineers gathering from all over the country, set down beginners as ...
2009 International Symposium on VLSI Design, Automation and Test, VLSI-DAT \\'09 68-71 Dec 2009
This paper proposes three approaches for allocation of scratch-pad memory in non-preemptive fixed-priority multi-task systems. These approaches can reduce energy consumption of instruction memory. Each approach is formulated as an integer programm...
情報処理学会研究報告. SLDM, [システムLSI設計技術] 134(32) 109-114 Mar 2008
In this paper, we propose three approaches to allocation of scratch-pad memory for non-preemptive fixed-priority multi-task systems. These approaches can reduce energy consumption of instruction memory. Each approach is formulated as an integer pr...
In this paper, we propose three approaches to allocation of scratch-pad memory for preemptive fixed-priority multi-task systems. These approaches can reduce energy consumption of instruction memory. Each approach is formulated as an integer progra...
情報処理学会研究報告. EMB, 組込みシステム 2008(32) 109-114 Mar 2008
In this paper, we propose three approaches to allocation of scratch-pad memory for non-preemptive fixed-priority multi-task systems. These approaches can reduce energy consumption of instruction memory. Each approach is formulated as an integer pr...
Proceedings of The International Conference on Embedded Software and Systems, ICESS 2008 93-97 Sep 2008
A number of approaches have been proposed so far for reducing the energy consumption of embedded systems by using scratch-pad memory. However, most of previous work focused on dynamic energy reduction, and did not take enough consideration of the ...
In this paper, we propose three approaches to allocation of scratch-pad memory for non-preemptive fixed-priority multi-task systems. These approaches can reduce energy consumption of instruction memory. Each approach is formulated as an integer pr...
In this paper, we propose three approaches to allocation of scratch-pad memory for non-preemptive fixed-priority multi-task systems. These approaches can reduce energy consumption of instruction memory. Each approach is formulated as an integer pr...
