仁田山晃寛 (Akihiro Nitayama) - マイポータル

基本情報

学位: 工学博士(東京大学)

J-GLOBAL ID: 201401048018334292
researchmap会員ID: 7000010081

外部リンク: http://db.tohoku.ac.jp/whois/detail/ff000f41a0255f23463589ba92cf95cc.html

研究キーワード

経歴

東北大学国際集積エレクトロニクス研究開発センター戦略企画部門, 教授

MISC

111

Bit Cost Scalable (BiCS) technology for future ultra high density memories

Nitayama, A, Aochi, H

Int. Symp. VLSI Technol., Syst. Appl., VLSI-TSA 6545626 2013年
Bit Cost Scalable (BiCS) technology for future ultra high density storage memories

Nitayama, A, Aochi, H

Dig Tech Pap Symp VLSI Technol 6576685 2013年
Bit Cost Scalable (BiCS) technology for future ultra high density memories

Akihiro Nitayama, Hideaki Aochi

2013 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2013 6545626 2013年
Bit Cost Scalable (BiCS) technology for future ultra high density storage memories

Nitayama, A, Aochi, H

Dig Tech Pap Symp VLSI Technol 6576685 2013年
A scalable shield-bitline-overdrive technique for sub-1.5 v chain FeRAMs

Takashima, D, Shiga, H, Hashimoto, D, Miyakawa, T, Shiratake, S.-I, Hoya, K, Ogiwara, R, Takizawa, R, Doumae, S, Fukuda, R …

IEEE J Solid State Circuits 46(9) 5954136 2011年
A scalable shield-bitline-overdrive technique for sub-1.5 v chain FeRAMs

Takashima, D, Shiga, H, Hashimoto, D, Miyakawa, T, Shiratake, S.-I, Hoya, K, Ogiwara, R, Takizawa, R, Doumae, S, Fukuda, R …

IEEE J Solid State Circuits 46(9) 5954136 2011年
Vertical 3D NAND Flash Memory Technology

Akihiro Nitayama, Hideaki Aochi

ULSI PROCESS INTEGRATION 7 41(7) 15-25 2011年
A 64-Mb Chain FeRAM with quad BL architecture and 200 MB/s burst mode

Hoya, K, Takashima, D, Shiratake, S, Ogiwara, R, Miyakawa, T, Shiga, H, Doumae, S.M, Ohtsuki, S, Kumura, Y, Shuto, S …

IEEE Trans Very Large Scale Integr VLSI Syst 18(12) 5339093 2010年
Reduction of bipolar disturb of floating-body cell (FBC) by silicide and thin silicon film formed at source and drain regions

Hamamoto, T, Fukuzumi, Y.a, Higashi, T, Nakajima, H.c, Minami, Y.a, Shino, T.c, Ohsawa, T, Nitayama, A.a

IEEE Trans. Electron Devices 57(8) 5484457 2010年
A 1.6 GB/s DDR2 128 Mb chain FeRAM with scalable octal bitline and sensing schemes

Shiga, H, Takashima, D.a, Shiratake, S.-I.a, Hoya, K.a, Miyakawa, T.a, Ogiwara, R.a, Fukuda, R.a, Takizawa, R.a, Hatsuda, K.a, Matsuoka, F.a …

IEEE J Solid State Circuits 45(1) 5357566 2010年
A scalable shield-bitline-overdrive technique for 1.3V chain FeRAM

Takashima, D, Shiga, H, Hashimoto, D, Miyakawa, T, Shiratake, S, Hoya, K, Ogiwara, R, Takizawa, R, Doumae, S, Fukuda, R …

Dig Tech Pap IEEE Int Solid State Circuits Conf 53 5433950 2010年
Bit Cost Scalable (BiCS) flash technology for future ultra high density storage devices

Nitayama, A, Aochi, H

Proc. Int. Symp. VLSI Technol., Syst. Appl., VLSI-TSA 5488917 2010年
A 64-Mb Chain FeRAM with quad BL architecture and 200 MB/s burst mode

Hoya, K, Takashima, D, Shiratake, S, Ogiwara, R, Miyakawa, T, Shiga, H, Doumae, S.M, Ohtsuki, S, Kumura, Y, Shuto, S …

IEEE Trans Very Large Scale Integr VLSI Syst 18(12) 5339093 2010年
Reduction of bipolar disturb of floating-body cell (FBC) by silicide and thin silicon film formed at source and drain regions

Hamamoto, T, Fukuzumi, Y.a, Higashi, T, Nakajima, H.c, Minami, Y.a, Shino, T.c, Ohsawa, T, Nitayama, A.a

IEEE Trans. Electron Devices 57(8) 5484457 2010年
Effect of Self-Heating on Time-Dependent Dielectric Breakdown in Ultrathin MgO Magnetic Tunnel Junctions for Spin Torque Transfer Switching Magnetic Random Access Memory

Keiji Hosotani, Makoto Nagamine, Tomomasa Ueda, Hisanori Aikawa, Sumio Ikegawa, Yoshiaki Asao, Hiroaki Yoda, Akihiro Nitayama

JAPANESE JOURNAL OF APPLIED PHYSICS 49(4) 04DD15 2010年
A 1.6 GB/s DDR2 128 Mb chain FeRAM with scalable octal bitline and sensing schemes

Shiga, H, Takashima, D.a, Shiratake, S.-I.a, Hoya, K.a, Miyakawa, T.a, Ogiwara, R.a, Fukuda, R.a, Takizawa, R.a, Hatsuda, K.a, Matsuoka, F.a …

IEEE J Solid State Circuits 45(1) 5357566 2010年
A scalable shield-bitline-overdrive technique for 1.3V chain FeRAM

Takashima, D, Shiga, H, Hashimoto, D, Miyakawa, T, Shiratake, S, Hoya, K, Ogiwara, R, Takizawa, R, Doumae, S, Fukuda, R …

Dig Tech Pap IEEE Int Solid State Circuits Conf 53 5433950 2010年
Bit Cost Scalable (BiCS) flash technology for future ultra high density storage devices

Nitayama, A, Aochi, H

Proc. Int. Symp. VLSI Technol., Syst. Appl., VLSI-TSA 5488917 2010年
Autonomous Refresh of Floating-Body Cell due to Current Anomaly of Impact Ionization

Takashi Ohsawa, Ryo Fukuda, Tomoki Higashi, Katsuyuki Fujita, Fumiyoshi Matsuoka, Tomoaki Shino, Hironobu Furuhashi, Yoshihiro Minami, Hiroomi Nakajima, Takeshi Hamamoto …

IEEE TRANSACTIONS ON ELECTRON DEVICES 56(10) 2302-2311 2009年10月
Ion Beam Etching Technology for High-Density Spin Transfer Torque Magnetic Random Access Memory

Kuniaki Sugiura, Shigeki Takahashi, Minoru Amano, Takeshi Kajiyama, Masayoshi Iwayama, Yoshiaki Asao, Naoharu Shimomura, Tatsuya Kishi, Sumio Ikegawa, Hiroaki Yoda …

JAPANESE JOURNAL OF APPLIED PHYSICS 48(8) 08HD021-08HD023 2009年8月

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