2017年8月
Measurement of Static Random Access Memory Power-Up State Using an Addressable Cell Array Test Structure
IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING
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- 巻
- 30
- 号
- 3
- 開始ページ
- 209
- 終了ページ
- 215
- 記述言語
- 英語
- 掲載種別
- 研究論文(学術雑誌)
- DOI
- 10.1109/TSM.2017.2692805
- 出版者・発行元
- IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
The data stored in a static random access memory (SRAM) immediately after power-up is of practical interest for some applications, such as SRAM physical unclonable functions. In this paper, measurements of SRAM cell power-up state (i.e., whether the cell is storing 0 or 1 after the power supply is turned on) using an addressable cell array test structure are reported. The test structure provides direct access to individual transistor characteristics of many SRAM cells, which would facilitate the characterization of SRAM power-up behavior. Methods and considerations necessary for reliable and stable power- up state characterization using the test structure will be discussed and demonstrated.
- リンク情報
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- DOI
- https://doi.org/10.1109/TSM.2017.2692805
- Web of Science
- https://gateway.webofknowledge.com/gateway/Gateway.cgi?GWVersion=2&SrcAuth=JSTA_CEL&SrcApp=J_Gate_JST&DestLinkType=FullRecord&KeyUT=WOS:000407348000004&DestApp=WOS_CPL
- URL
- https://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=85029382267&origin=inward
- ID情報
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- DOI : 10.1109/TSM.2017.2692805
- ISSN : 0894-6507
- eISSN : 1558-2345
- SCOPUS ID : 85029382267
- Web of Science ID : WOS:000407348000004