Masaharu Kobayashi

J-GLOBAL         Last updated: Oct 17, 2019 at 18:09
 
Avatar
Name
Masaharu Kobayashi
E-mail
masa-kobayashinano.iis.u-tokyo.ac.jp
Affiliation
The University of Tokyo

Research Areas

 
 

Academic & Professional Experience

 
May 2014
 - 
Today
Associate Professor, Institute of Industrial Science, The University of Tokyo
 
Feb 2010
 - 
Apr 2014
Research Staff Member, Watson Research Center, IBM corporation
 
Sep 2006
 - 
Jan 2010
Ph.D degree, Stanford University
 
Jun 2009
 - 
Sep 2009
Visiting Researcher, IMEC
 
Apr 2006
 - 
Aug 2006
Post master researcher, Institute of Industrial Science, The University of Tokyo
 

Published Papers

 
Ferroelectric-HfO2 transsitor memory with IGZO channel
Masaharu Kobayashi
The 77th Fujihara Seminar   18-19   Oct 2019   [Invited]
負性容量トランジスタの理解と今後の展望
小林 正治
第80回応用物理学会秋季学術講演会,北海道大学(北海道),2019年9月20日      Sep 2019   [Invited]
Demonstration of HfO2 based Ferroelectric FET with Ultrathin-body IGZO for High-Density Memory Application
FEI MO, Yusaku Tagawa, Chengji Jin, MinJu Ahn, Takuya Saraya, Toshiro Hiramoto, Masaharu Kobayashi
第80回応用物理学会秋季学術講演会,北海道大学(北海道), 18p-B11-2      Sep 2019
Mechanisms of Reverse-DIBL and NDR Observed in Ferroelectric FETs
Chengji Jin, Takuya Saraya, Toshiro Hiramoto, Masaharu Kobayashi
第80回応用物理学会秋季学術講演会,北海道大学(北海道),18p-B11-1      Sep 2019
Ferroelectric-HfO2 based transistor and memory technologies enabling ultralow power IoT applications
Masaharu Kobayashi
2019 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices (AWAD 2019), Busan, Korea   86-87   Jul 2019   [Invited]
Transient Negative Capacitance as Cause of Reverse Drain-induced Barrier Lowering and Negative Differential Resistance in Ferroelectric FETs
Chengji Jin, Takuya Saraya, Toshiro Hiramoto, and Masaharu Kobayashi,
VLSI technology symposium 2019, June 13th, 2019, Kyoto   220-221   Jun 2019   [Refereed]
Experimental Demonstration of Ferroelectric HfO2 FET with Ultrathin-body IGZO for High-Density and Low-Power Memory Application
Fei Mo, Yusaku Tagawa, Chengji Jin, MinJu Ahn, Takuya Saraya, Toshiro Hiramoto and Masaharu Kobayashi
VLSI technology symposium 2019, June 11th, 2019, Kyoto   42-43   Jun 2019   [Refereed]
Challenges and opportunities of ferroelectric-HfO2 based transistor and memory technologies
Masaharu Kobayashi
Symposium on Nano Device Technology, TSRI, hsinchu, Taiwan, Apr. 4, 2019   2   Apr 2019   [Invited]
Steep Subthreshold Slope below 60mV/dec in Junctionless SOI Transistors at Low Drain Voltage of 50mV
Min-Ju Ahn, Kiyoshi Takeuchi, Takuya Saraya, Masaharu Kobayashi, and Toshiro Hiramoto
3rd Electron Devices Technology and Manufacturing (EDTM) Conference 2019, Marina Bay Sands, Singapore, March 14, 2019      Mar 2019   [Refereed]
A Feasibility Study on Ferroelectric Shadow SRAMs Using a New Variability Design Scheme
Kiyoshi Takeuchi, Masaharu Kobayashi, and Toshiro Hiramoto
3rd Electron Devices Technology and Manufacturing (EDTM) Conference 2019, Marina Bay Sands, Singapore, March 14, 2019.   109-111   Mar 2019   [Refereed]
Reduced variability of drain-induced barrier lowering and subthreshold slope at high temperature in bulk and silicon-on-thin-buried-oxide (SOTB) MOSFETs
Shuang Gao, Tomoko Mizutani, Kiyoshi Takeuchi, Masaharu Kobayashi, and Toshiro Hiramoto
Japanese Journal of Applied Physics   58(SB) SBBA11   Mar 2019   [Refereed]
反強誘電体ZrO2を有するMIS構造のユニポーラスイッチング特性
   Mar 2019
On the Physical Mechanism of Transient Negative Capacitance Effect in Deep Subthreshold Region
Chengji Jin, Takuya Saraya, Toshiro Hiramot, Masaharu Kobayashi
Journal of Electron Device Society   7 368-374   Feb 2019   [Refereed]
Ferroelectric HfO2 Tunnel Junction Memory With High TER and Multi-Level Operation Featuring Metal Replacement Process
Masaharu Kobayashi, Yusaku Tagawa, Fei Mo, Takuya Saraya, Toshiro Hiramoto
Journal of Electron Device Society   7 134-139   Dec 2018   [Refereed]
Experimental Study on the Role of Polarization Switching in Subthreshold Characteristics of HfO2-based Ferroelectric and Anti-ferroelectric FET
Chenji Jin, Kyungmin Jang, Takuya Saraya, Toshiro Hiramoto, and Masaharu Kobayashi
International Conference on Electron Device Meeting (IEDM) 2018, San Francisco, CA   723-726   Dec 2018   [Refereed]
Scalability Study on Ferroelectric-HfO2 Tunnel Junction Memory Based on Non-equilibrium Green Function Method with Self-consistent Potential
Fei Mo, Yusaku Tagawa, Takuya Saraya, Toshiro Hiramoto, and Masaharu Kobayashi
International Conference on Electron Device Meeting (IEDM) 2018, San Francisco, CA   372-375   Dec 2018   [Refereed]
Proposal of scalable silicon qubits with vertically stacked structures fabricated by CMOS technology
Yuki Ito, Masaharu Kobayashi, and Toshiro Hiramoto
Silicon Quantum Electronics Workshop (SQEW), Doltone House, Sydney, Australia, Poster No. 23, November 13, 2018.      Nov 2018   [Refereed]
Role of gate current and polarization switching in sub-60mV/decade steep subthreshold slope in metal-ferroelectric HfZrO2-metal-insulator-Si FET
Kyungmin Jang, Masaharu Kobayashi, Toshiro Hiramoto
Japanese Journal of Applied Physics   57(11) 114202   Oct 2018   [Refereed]
A perspective on ultrasmall silicon CMOS transistor technologies
Masaharu Kobayashi
2018年日本表面真空学会学術講演会,3Ca12,神戸   174   Nov 2018   [Invited]
HfO2-Based Ferroelectric Tunnel Junction Memory with Large Tunneling Electroresistance Effect and Multi-level Cell
Masaharu Kobayashi
ENGE 2018, Jeju, Korea      Nov 2018   [Invited]
Pixel-Parallel Three-Dimensional Integrated CMOS Image Sensors by Using Direct Bonding of Silicon-on-Insulator Wafers for Next-Generation Television Systems
Masahide Goto, Yuki Honda, Toshihisa Watabe, Kei Hagiwara, Masakazu Nanba, Yoshinori Iguchi, Takuya Saraya, Masaharu Kobayashi, Eiji Higurashi, Hiroshi Toshiyoshi, and Toshiro Hiramoto
The Forum on the Science and Technology of Silicon Materials 2018, Tsushima Campus, Okayama University, October 21, 2018      Oct 2018   [Refereed][Invited]
Pixel-Parallel 3D Integrated CMOS Image Sensors Developed by Direct Bonding of SOI Layers for Next-Generation Video Systems
Masahide Goto, Yuki Honda, Toshihisa Watabe, Kei Hagiwara, Masakazu Nanba, and Yoshinori Iguchi, Takuya Saraya, Masaharu Kobayashi, Eiji Higurashi, Hiroshi Toshiyoshi and Toshiro Hiramoto
IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), Hyatt Regency San Francisco Airport, Burlingame, CA, USA, October 17, 2018      Oct 2018   [Refereed][Invited]
Technology Breakthrough by Ferroelectric HfO2 for Low Power Logic and Memory Applications (S3S)
Masaharu Kobayashi
IEEE S3S conference 2018, San Francisco, CA, Oct. 15, 2018      Oct 2018   [Invited]
A perspective on steep-subthreshold-slope negative-capacitance field-effect transistor
Masaharu Kobayashi
Applied Physics Express   11 110101   Oct 2018   [Refereed][Invited]
Technology Breakthrough by Ferroelectric HfO2 for Low Power Logic and Memory Applications
Masaharu Kobayashi
ECS Transactions, Cancun, Mexico   86(2) 21-25   Oct 2018   [Refereed][Invited]
画素並列信号処理3層構造イメージセンサの設計
後藤正英,本田悠葵,渡部俊久,萩原 啓,難波正和,井口義則,更屋拓哉,小林正治,日暮栄治,年吉 洋,平本俊郎
第79回応用物理学会秋季学術講演会,名古屋国際会議場,19p-432-7,2018年9月19日.      Sep 2018   [Refereed]
Steep Subthreshold Slope in Ferroelectric FET by Transient Negative Capacitance Effect with Polarization Switching Delay
Chengji Jin, Takuya Saraya, Toshiro Hiramoto, Masaharu Kobayashi
   Sep 2018
Temperature Effect on DIBL Variability in Bulk and SOTB MOSFETs
S. Gao, T. Mizutani, K. Takeuchi, M. Kobayashi, T. Hiramoto
International Conference on Solid State Devices and Materials (SSDM) 2018, Tokyo, Japan   167-168   Sep 2018   [Refereed]
On the Physical Origin of Steep Subthreshold Slope in Ferroelectric FET: Transient Negative Capacitance Effect Caused by Polarization Switching Delay
C. Jin, T. Hiramoto, M. Kobayashi
International Conference on Solid State Devices and Materials (SSDM) 2018, Tokyo, Japan   199-200   Sep 2018   [Refereed]
強誘電性材料によるSi集積回路の低消費電力化の検討
小林 正治
第79回応用物理学会秋季学術講演会、名古屋   19p-233-10   Sep 2018   [Refereed][Invited]
高TER・多値メモリ性を有するHfO2強誘電トンネル接合メモリのためのデバイスおよびプロセス設計
多川 友作、莫 非、更屋 拓哉、平本 俊郎、小林 正治
第79回応用物理学会秋季学術講演会、名古屋   19p-233-11   Sep 2018   [Refereed]
強誘電体HfO2によるロジック・メモリデバイスの新展開
小林 正治
第79回応用物理学会秋季学術講演会、名古屋   20p-141-10   Sep 2018   [Refereed][Invited]
Ferroelectric Neuron for Feedforward Neural Network Application
Fei Mo、Tagawa Yusaku、Saraya Takuya、Hiramoto Toshiro、Kobayashi Masaharu
第79回応用物理学会秋季学術講演会、名古屋   20p-141-13   Sep 2018   [Refereed]
Reduced Subthreshold Slope Variability at High Temperature in Bulk and SOTB MOSFETs
Shuang Gao、Tomoko Mizutani、Kiyoshi Takeuchi、Masaharu Kobayashi、Toshiro Hiramoto
第79回応用物理学会秋季学術講演会、名古屋   20a-CE-2   Sep 2018   [Refereed]
Reduced Drain-Induced-Barrier-Lowering (DIBL) Variability at High Temperature in Bulk and SOTB MOSFETs
Shuang Gao、Tomoko Mizutani、Kiyoshi Takeuchi、Masaharu Kobayashi、Toshiro Hiramoto
第79回応用物理学会秋季学術講演会、名古屋   20a-CE-3   Sep 2018   [Refereed]
複数回ストレスを利用した特性ばらつき自己修復手法のBulk SRAMセルへの応用
水谷 朋子、竹内 潔、更屋 拓哉、小林 正治、平本 俊郎
20a-CE-4   Sep 2018   [Refereed]
Understanding Temperature Effect on Subthreshold Slope Variability in Bulk and SOTB MOSFETs
Shuang Gao、Tomoko Mizutani、Kiyoshi Takeuchi、Masaharu Kobayashi、Toshiro Hiramoto
電子情報通信学会シリコン材料・デバイス研究会 (SDM)、北海道      Aug 2018   [Refereed]
強誘電体HfO2 FTJの高TER化と多値化のためのデバイスおよびプロセス設計
小林正治、多川友作、バク ヒ、平本俊郎
電子情報通信学会シリコン材料・デバイス研究会(SDM)および集積回路研究会(ICD)合同研究会,8/7-8/9,北海道      Aug 2018   [Refereed]
Three-Layer Stacked Au/SiO2 Hybrid Bonding with 6-μm-Pitch Au Electrodes for 3D Structured Image Sensors
Yuki Honda, Masahide Goto, Toshihisa Watabe, Kei Hagiwara, Masakazu Nanba, Yoshinori Iguchi, Takuya Saraya, Masaharu Kobayashi, Eiji Higurashi, Hiroshi Toshiyoshi, and Toshiro Hiramoto
The 2nd Taiwan-Japan Joint Symposium in Taiwan, Fullon Hotel Taipei East, Taipei, Taiwan, June 1, 2018      Jun 2018   [Refereed]
Device and Process Design for HfO 2 -Based Ferroelectric Tunnel Junction - 3 - Memory with Large Tunneling Electroresistance Effect and Multi-level Cell
M. Kobayashi, Y. Tagawa, M. Fei, T. Saraya, T. Hiramoto
2018 IEEE Silicon Nanoelectronics Workshop, Honolulu, HI, USA   29-30   Jun 2018   [Refereed]
Reduced Subthreshold Slope Variability at High Temperature in Bulk and SOTB MOSFETs
S. Gao, T. Mizutani, K. Takeuchi, M. Kobayashi, T. Hiramoto
2018 IEEE Silicon Nanoelectronics Workshop June 17-18, 2018 Hilton Hawaiian Village, Honolulu, HI USA Satellite conference of 2018 IEEE Silicon Nanoelectronics Workshop Hilton Hawaiian Village, Honolulu, HI USA   9-10   Jun 2018   [Refereed]
Technology Breakthrough by Ferroelectric HfO 2 for Low Power Logic and Memory Applications
M. Kobayashi
2018 IEEE Silicon Nanoelectronics Workshop June 17-18, 2018 Hilton Hawaiian Village, Honolulu, HI USA Satellite conference of 2018 IEEE Silicon Nanoelectronics Workshop Hilton Hawaiian Village, Honolulu, HI USA   21-25   Jun 2018   [Refereed][Invited]
Improving Performance and Variability of Gate-All-Around Polycrystalline Silicon Nanowire Transistors by High Temperature Annealing with Passivation Oxide ,
K. –H. Jang, T. Saraya, M. Kobayashi, N. Sawamoto, A. Ogura, T. Hiramoto
2018 IEEE Silicon Nanoelectronics Workshop Hilton Hawaiian Village, Honolulu, HI USA   59-60   Jun 2018   [Refereed]
Quarter Video Graphics Array Full-Digital Image Sensing with Wide Dynamic Range and Linear Output by Using Pixel-Wise 3D Integration
Masahide Goto, Yuki Honda, Toshihisa Watabe, Kei Hagiwara, Masakazu Nanba, Yoshinori Iguchi, Takuya Saraya, Masaharu Kobayashi, Eiji Higurashi, Hiroshi Toshiyoshi, and Toshiro Hiramoto
IEEE International Symposium on Circuits & Systems (ISCAS), Firenze Fiera Congress and Exhibition Center, Florence, Italy, May 28, 2018.      May 2018   [Refereed]
Pixel-Parallel 3-D Integrated CMOS Image Sensors for Next-Generation Video Systems
M. Goto, Y. Honda, T. Watabe, K. Hagiwara, M. Nanba, Y. Iguchi, T. Saraya, M. Kobayashi, E. Higurashi, H. Toshiyoshi, and T. Hiramoto
233rd Electrochemical Society (ECS) Meeting, Washington State Convention Center, Seattle, WA, USA, May 15, 2018      May 2018   [Refereed][Invited]
Drain-Induced Variability Due to Quantum Confinement Effect in Extremely Narrow Silicon Nanowire Transistors with Width down to 2nm
Toshiro Hiramoto, Tomoko Mizutani, Kiyoshi Takeuchi, Takuya Saraya, and Masaharu Kobayashi
International Conference on Nanoelectronics Strategy (INS), Qatar Science Hall, Tohoku University, May 14, 2018      May 2018   [Refereed]
Statistics of Random Telegraph Noise Amplitude in Extremely Narrow Silicon Nanowire Transistors with Width down to 2nm
Toshiro Hiramoto, Hao Qiu, Kiyoshi Takeuchi, Tomoko Mizutani, Takuya Saraya, and Masaharu Kobayashi
International Conference on Nanoelectronics Strategy (INS), Qatar Science Hall, Tohoku University, May 14, 2018      May 2018   [Refereed]
Design Considerations for Negative Capacitance FET with Ferroelectric HfO2
Masaharu Kobayashi
2018 ISAF-FMA-AMF-AMEC-PFM Joint Conference, Hiroshima, Japan   112   May 2018   [Refereed][Invited]
Optimizing MOS-gated thyristor using voltage-based equivalent circuit model for designing steep-subthreshold-slope PN-body-tied silicon-on-insulator FET
Daiki Ueda, Kiyoshi Takeuchi, Masaharu Kobayashi, and Toshiro Hiramoto
Japanese Journal of Applied Physics   57(4S) 04FD06   Mar 2018   [Refereed]
Lowering data retention voltage in static random access memory array by post fabrication self-improvement of cell stability by multiple stress application
Tomoko Mizutani, Kiyoshi Takeuchi, Takuya Saraya, Masaharu Kobayashi, and Toshiro Hiramoto
Japanese Journal of Applied Physics   57(4S) 04FD08   Mar 2018   [Refereed]
Experimental Observation and Simulation Model for Transient Characteristics of Negative-Capacitance in Ferroelectric HfZrO2 Capacitor
Kyungmin Jang, Nozomu Ueyama, Masaharu Kobayashi, and Toshiro Hiramoto
IEEE Journal of Electron Devices Society   6(1) 346-353   Mar 2018   [Refereed]
3D Scaling of Si-IGBT
H. Iwai, K. Kakushima, T. Hoshii, K. Tsutsui, A. Nakajima, S. Nishizawa, H. Wakabayashi, I. Muneta, K. Sato, T. Matsudai, W. Saito, T. Saraya, K. Itou, M. Fukui, S. Suzuki, M. Kobayashi, T. Takakura, T. Hiramoto, A. Ogura, Y. Numasawa, I. Omura, and H. Ohashi
Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS), Abba Granada Hotel, Granada, Spain      Mar 2018   [Refereed][Invited]
MOS-Gated Thyristorの電圧ベース等価回路モデルを用いた急峻スロープPN-Body Tied SOI FETのパラメータ依存性の検討
植田大貴,竹内 潔,小林正治,平本俊郎
第65回応用物理学会春季学術講演会,早稲田大学西早稲田キャンパス(東京)   18a-G203-5   Mar 2018   [Refereed]
複数回ストレスを利用した特性ばらつき自己修復手法によるSRAMデータ保持電圧の最小化
水谷朋子,竹内 潔,更屋拓哉,小林正治,平本俊郎
第65回応用物理学会春季学術講演会,早稲田大学西早稲田キャンパス(東京)   18p-G203-1   Mar 2018   [Refereed]
On gate stack scalability of double-gate negative-capacitance FET with ferroelectric HfO2 for energy efficient sub-0.2V operation
Kyungmin Jang, Takuya Saraya, Masaharu Kobayashi, and Toshiro Hiramoto
Japanese Journal of Applied Physics   57(2) 024201   Dec 2017   [Refereed]
Experimental Demonstration of a Nonvolatile SRAM With Ferroelectric HfO2 Capacitor for Normally Off Application
Masaharu Kobayashi, Nozomu Ueyama, Kyungmin Jang, and Toshiro Hiramoto
IEEE Journal of Electron Devices Society,   6(1) 280-285   Feb 2018   [Refereed]
超低消費電力エレクトロニクスに向けた強誘電体HfO2系薄膜材料による デバイス技術のブレークスルー
小林正治
電子デバイス界面テクノロジー研究会,東レ総合研修センター(静岡)   51(54)    Jan 2018   [Refereed][Invited]
A Nonvolatile SRAM Based on Ferroelectric HfO2 capacitor for IoT Power Management
Masaharu Kobayashi, Nozomu Ueyama, and Toshiro Hiramoto
ECS Transactions, Seattle, WA   85(6) 111-114   May 2018   [Refereed][Invited]
Fabrication of Three-Dimensional Integrated CMOS Image Sensors with Quarter VGA Resolution by Pixel-Wise Direct Bonding Technology
Masahide Goto, Yuki Honda, Toshihisa Watabe, Kei Hagiwara, Masakazu Nanba, Yoshinori Iguchi, Takuya Saraya, Masaharu Kobayashi, Eiji Higurashi, Hiroshi Toshiyoshi, and Toshiro Hiramoto
30th International Microprocesses and Nanotechnology Conference (MNC2017), Ramada Plaza JeJu Hotel, Jeju, Korea      Nov 2017   [Refereed]
CMOSプロセスと整合性の高い強誘電ナノ薄膜材料による不揮発性メモリの新展開
小林正治
NEDIA 第4回 電子デバイスフォーラム京都(2017),京都リサーチパーク(京都)      Nov 2017   [Refereed][Invited]
3次元構造撮像デバイスの微細・高集積化に向けた直接接合による多層積層技術
本田悠葵,後藤正英,渡部俊久,萩原 啓,難波正和,井口義則,更屋拓哉,小林正治,日暮栄治,年吉 洋,平本俊郎
応用物理学会第9回集積化MEMSシンポジウム,広島      Nov 2017   [Refereed]
三次元スケーリングによるIGBTのVCEsat低減の実験的検証
筒井一生,角嶋邦之,星井拓也,中島 昭,西澤伸一,若林 整,宗田伊理也,佐藤克己,末代知子,齋藤 渉,更屋拓哉,伊藤一夫,福井宗利,鈴木慎一,小林正治,高倉俊彦,平本俊郎,小椋厚志,沼沢陽一郎,大村一郎,大橋弘通,岩井 洋
電気学会電子デバイス・半導体電力変換合同研究会,鹿児島大学稲盛会館   EDD-17-074-SPC-17-173   Nov 2017   [Refereed]
Three-Layered Stacking Process by Au/SiO2 Hybrid Bonding for 3D Structured Image Sensors
Yuki Honda, Masahide Goto, Toshihisa Watabe, Kei Hagiwara, Masakazu Nanba, Yoshinori Iguchi, Takuya Saraya, Masaharu Kobayashi, Eiji Higurashi, Hiroshi Toshiyoshi, and Toshiro Hiramoto
ECS Transactions   80(4) 227-231   Oct 2017   [Refereed]
Masaharu Kobayashi
The Fifth Berkeley Symposium on Energy Efficient Electronic Systems & Steep Transistors Workshop, the University of California, Berkeley, USA      Oct 2017   [Refereed][Invited]
Parallel Programmable Nonvolatile Memory Using SRAM Cells
Toshiro Hiramoto, Tomoko Mizutani, Kiyoshi Takeuchi, Masaharu Kobayashi
12th International Conference on ASIC (ASICON 2017), Hotel Pullman Guiyang, Guiyang, China   434-437   Oct 2017   [Refereed][Invited]
K. Tsutsui, K. Kakushima, T. Hoshii, A. Nakajima, S. Nishizawa, H. Wakabayashi, I. Muneta, K. Sato, T. Matsudai, W. Saito, T. Saraya, K. Itou, M. Fukui, S. Suzuki, M. Kobayashi, T. Takakura, T. Hiramoto, A. Ogura, Y. Numasawa, I. Omura, H. Ohashi, and H. Iwai
12th International Conference on ASIC (ASICON 2017), Hotel Pullman Guiyang, Guiyang, China   1155-1158   Oct 2017   [Refereed][Invited]
Present status and future prospects of Si-based CMOS devices
小林 正治
第1回 CSRN-Tokyo Workshop 2017,東京大学(東京)      Oct 2017   [Refereed]
3次元構造撮像デバイスの画素内A/D変換回路に適用可能なイベントドリブン型雑音除去回路の開発
後藤正英,本田悠葵,渡部俊久,萩原 啓,難波正和,井口義則,更屋拓哉,小林正治,日暮栄治,年吉 洋,平本俊郎
応用物理学会第9回集積化MEMSシンポジウム,広島      Oct 2017   [Refereed]
Optimizing MOS-Gated Thyristor using Voltage-based Equivalent Circuit Model for Designing Steep Subthreshold Slope PN-Body Tied SOI FET
Daiki Ueda, Kiyoshi Takeuchi, Masaharu Kobayashi, and Toshiro Hiramoto
International Conference on Solid State Devices and Materials (SSDM), Sendai International Center, Miyagi   243-244   Sep 2017   [Refereed]
Lowering Minimum Operation Voltage (Vmin) in SRAM Array by Post-Fabrication Self-Improvement of Cell Stability by Multiple Stress Application
Tomoko Mizutani, Kiyoshi Takeuchi, Takuya Saraya, Masaharu Kobayashi and Toshiro Hiramoto
International Conference on Solid State Devices and Materials (SSDM), Sendai International Center, Miyagi   245-246   Sep 2017   [Refereed]
Demonstration of Reduction in Vce(sat) of IGBT based on a 3D Scaling Principle
K. Kakushima, T. Hoshii, K. Tsutsui, A. Nakajima, S. Nishizawa, H. Wakabayashi, I. Muneta, K. Sato, T. Matsudai, W. Saito, T. Saraya, K. Itou, M. Fukui, S. Suzuki, M. Kobayashi, T. Takakura, T. Hiramoto, A. Ogura, Y. Numasawa, I. Omura, H. Ohashi, and H. Iwai
International Conference on Solid-State Devices and Materials (SSDM), Sendai International Center, Miyagi   669-670   Sep 2017   [Refereed][Invited]
強誘電性マルチドメイン相互作用モデルを用いた強誘電体HfO2の動特性に関する考察
Jang Kyungmin,上山 望,小林正治,平本俊郎
第78回応用物理学会秋季学術講演会,福岡国際会議場   7p-A204-13   Sep 2017   [Refereed]
低消費電力応用に向けた強誘電体HfO2薄膜不揮発性SRAMの動作実証
小林正治,上山 望,平本 俊郎
第78回応用物理学会秋季学術講演会,福岡国際会議場   7p-A204-14   Sep 2017   [Refereed]
急峻サブスレッショルドスロープPN-Body Tied SOI FETの最適化に向けたMOS-Gated Thyristorの電圧ベース等価回路モデル
植田大貴,竹内 潔,小林正治,平本俊郎
第78回応用物理学会秋季学術講演会,福岡国際会議場   8a-C18-6   Sep 2017   [Refereed]
Variability Characterictics of Gate-All-Around Polycrystalline Silicon Nanowire Transistors with 10nm-Scale Width
Kihyun Jang、Takuya Saraya、Masaharu Kobayashi、Naomi Sawamoto、Atsushi Ogura、Toshiro Hiramoto
第78回応用物理学会秋季学術講演会,福岡国際会議場   8a-C18-11   Sep 2017   [Refereed]
画素並列信号処理3次元構造イメージセンサのA/D変換回路に適したイベントドリブン型相関二重サンプリング回路の開発
後藤正英,本田悠葵,渡部俊久,萩原 啓,難波正和,井口義則,更屋拓哉,小林正治,日暮栄治,年吉 洋,平本俊郎
情報センシング研究会,械振興会館(東京)      Sep 2017   [Refereed]
Kiyoshi Takeuchi, Tomoko Mizutani, Hirofumi Shinohara, Takuya Saraya, Masaharu Kobayashi, and Toshiro Hiramoto
IEEE Transactions on Semiconductor Manufacturing   30(3) 201-215   Aug 2017   [Refereed]
ノーマリーオフ動作のための強誘電体HfO2を集積した不揮発性SRAM
小林正治,上山 望,平本俊郎
電子情報通信学会シリコン材料・デバイス研究会(SDM)および集積回路研究会(ICD)合同研究会,北海道大学情報教育館   SDM2017-37   Aug 2017   [Refereed][Invited]
不揮発情報一括書き込み・読み出し可能な初期値確定SRAM
水谷朋子,竹内 潔,更屋拓哉,篠原尋史,小林正治,平本俊郎
電子情報通信学会シリコン材料・デバイス研究会(SDM)および集積回路研究会(ICD)合同研究会,北海道大学情報教育館   SDM2017-38   Aug 2017   [Refereed]
Kyungmin Jang, Takuya Saraya, Masaharu Kobayashi, Toshiro Hiramoto
Solid State Electronics   136 60-67   Jun 2017   [Refereed]
Daiki Ueda Kiyoshi Takeuchi, Masaharu Kobayashi, and Toshiro Hiramoto
Silicon Nanoelectronics Workshop, Rihga Royal Hotel Kyoto, Kyoto   13-14   Jun 2017   [Refereed]
Kyungmin Jang. Nozomu Ueyama, Masaharu Kobayashi, and Toshiro Hiramoto
Silicon Nanoelectronics Workshop, Rihga Royal Hotel Kyoto, Kyoto   15-16   Jun 2017   [Refereed]
Ki-Hyun Jang, Takuya Saraya, Masaharu Kobayashi, Naomi Sawamoto, Atsushi Ogura, and Toshiro Hiramoto
Silicon Nanoelectronics Workshop, Rihga Royal Hotel Kyoto, Kyoto   33-34   Jun 2017   [Refereed]
Hao Qiu, Kiyoshi Takeuchi, Tomoko Mizutani, Takuya Saraya, Jiezhi Chen, Masaharu Kobayashi, and Toshiro Hiramoto
Symposium on VLSI Technology, Rihga Royal Hotel Kyoto, Kyoto   50-51   Jun 2017   [Refereed]
Masaharu Kobayashi, Nozomu Ueyama and Toshiro Hiramoto
Symposium on VLSI Technology, Rihga Royal Hotel Kyoto, Kyoto   156-157   Jun 2017   [Refereed]
Technology break-through by ferroelectric HfO2 for ultralow power electronics
Masaharu Kobayashi
International Nanotechnology Conference on Communication and Cooperation Workshop (INC workshop), Indiana University – Purdue University Indianapolis (IUPUI) Campus Center, IN, USA      May 2017   [Refereed][Invited]
Yuki Honda, Masahide Goto, Toshihisa Watabe, Kei Hagiwara, Masakazu Nanba, Yoshinori Iguchi, Takuya Saraya, Masaharu Kobayashi, Eiji Higurashi, Hiroshi Toshiyoshi, and Toshiro Hiramoto
2017 5th International Workshop on Low Temperature Bonding for 3D Integration (LTB-3D 2017), Hongo Campus, The University of Tokyo      May 2017   [Refereed]
Event-Driven Correlated Double Sampling for Pulse-Frequency-Modulation A/D Converters Integrated in Pixel-Parallel Image Sensors
Masahide Goto, Yuki Honda, Toshihisa Watabe, Kei Hagiwara, Masakazu Nanba, Yoshinori Iguchi, Takuya Saraya, Masaharu Kobayashi, Eiji Higurashi, Hiroshi Toshiyoshi, and Toshiro Hiramoto
2017 International Image Sensor Workshop (IISW), Grand Prince Hotel Hiroshima, Hiroshima      May 2017   [Refereed]
Masaharu Kobayashi, Kyungmin Jang, Nozomu Ueyama, and Toshiro Hiramoto
IEEE Transactions on Nanotechnology   16(2) 253-258   Jan 2017   [Refereed]
Correlation between static random access memory power-up state and transistor variation
Kiyoshi Takeuchi, Tomoko Mizutani, Takuya Saraya, Hirofumi Shinohara, Masaharu Kobayashi, and Toshiro Hiramoto
Japanese Journal of Applied Physics   56(4S) 04CD03   Mar 2017   [Refereed]
Parallel programmable nonvolatile memory using ordinary static random access memory cells
Tomoko Mizutani, Kiyoshi Takeuchi, Takuya Saraya, Hirofumi Shinohara, Masaharu Kobayashi, and Toshiro Hiramoto
Japanese Journal of Applied Physics   56(4S) 04CD17   Mar 2017   [Refereed]
通常のSRAMセルを利用した一括書き込み可能な不揮発性メモリ
水谷朋子,竹内 潔,更屋拓哉,篠原尋史,小林正治,平本俊郎
第64回応用物理学会春季学術講演会,パシフィコ横浜(神奈川)   16a-412-5   Mar 2017   [Refereed]
SRAM の電源投入直後初期状態とトランジスタばらつきの関係
竹内 潔,水谷朋子,篠原尋史,更屋拓哉,小林正治,平本俊郎
第64回応用物理学会春季学術講演会,パシフィコ横浜(神奈川)   16a-412-6   Mar 2017   [Refereed]
負性容量トランジスタに向けた強誘電性HfZrO2膜における負性容量の直接観測
上山 望,小林正治,平本俊郎
第64回応用物理学会春季学術講演会,パシフィコ横浜(神奈川)   17p-304-13   Mar 2017   [Refereed]
強誘電体HfO2ダブルゲート負性容量FETの動特性に関する考察
Jang Kyungmin、上山 望、小林正治、平本俊郎
第64回応用物理学会春季学術講演会,パシフィコ横浜(神奈川)   17p-304-14   Mar 2017   [Refereed]
強誘電体HfO2を用いたGate-All-Aroundナノワイヤ負性容量FETにおけるIon/Ioff比の向上とそのスケーラビリティ
Jang Kyungmin,更屋拓哉,小林正治,平本俊郎
第64回応用物理学会春季学術講演会,パシフィコ横浜(神奈川)   17p-304-15   Mar 2017   [Refereed]
Negative Capacitance Transistor for Steep Subthreshold Slope
Masaharu Kobayashi
Electron Devices Technology and Manufacturing (EDTM) Conference 2018, Ariston Hotel Kobe, Kobe, Japan      Mar 2017   [Refereed][Invited]
Experimental Study on Polarization-Limited Operation Speed of Negative Capacitance FET with Ferroelectric HfO2
小林正治,上山 望,蒋 京珉,平本俊郎
応用物理学会シリコンテクノロジー分科会研究会,機械振興会館(東京)      Jan 2017   [Refereed][Invited]
強誘電性HfO2を用いた負性容量トランジスタの動作速度に関する実験検討
小林正治,上山 望,蒋 京珉,平本俊郎
電子情報通信学会回路・デバイス・境界領域技術研究会,国民宿舎みやじま杜の宿(広島)      Jan 2017   [Refereed][Invited]
Experimental verification of a 3D scaling principle for low Vce(sat)IGBT
K. Kakushima, T. Hoshii, K. Tsutsui, A. Nakajima, S. Nishizawa, H. Wakabayashi, I. Muneta, K. Sato, T. Matsudai, W. Saito, T. Saraya, K. Itou, M. Fukui, S. Suzuki, M. Kobayashi, T. Takakura, T. Hiramoto, A. Ogura, Y. Numasawa, I. Omura, H. Ohashi, and H. Iwai
IEEE International Electron Devices Meeting (IEDM), Hilton San Francisco Union Square, San Francisco, CA, USA   268-271   Dec 2016   [Refereed]

Research Grants & Projects

 
Exploratory research on ultralow power system based on CMOS compatible ferroelectric devices
Japan Society for the Promotion of Science: Grant-in-Aid for Scientific Research(B)
Project Year: Apr 2018 - Mar 2021    Investigator(s): Masaharu Kobayashi
Research and development of nanosheet wireless probe enabling multiple and simultaneous probe for neuron activity signal and neurotransmitter
Japan Society for the Promotion of Science: Grant-in-Aid for Scientific Research(B)
Project Year: Apr 2018 - Mar 2021    Investigator(s): Toshinori Fujie
Research and development of steep subthreshold slope transistor by using negative capacitance effect and its applications
Japan Science and Technology Agency (JST): PRESTO
Project Year: Oct 2015 - Mar 2019    Investigator(s): Masaharu Kobayashi
Research and development of ferroelectric HfO2 tunnel junction memory for ultralow power operation based on atomic scale modeling and simulation
CASIO SCIENCE PROMOTION FOUNDATION: Research funding
Project Year: Jan 2018 - Dec 2018    Investigator(s): Masaharu Kobayashi
Research and Development of design guideline of ferroelectric HfO2 tunnel junction memory atomic scale based on atomic scale modeling and simulation
The Murata Science Foundation: Research funding
Project Year: Jul 2017 - Jun 2018    Investigator(s): Masaharu Kobayashi
Design and demonstration of ultralow power circuit of steep slope transistor and embedded FeRAM by ferroelectric HfO2
Japan Society for the Promotion of Science: Grant-in-Aid for Young Scientists(B),
Project Year: Apr 2016 - Mar 2018    Investigator(s): Masaharu Kobayashi

Awards & Honors

 
May 2019
強誘電体HfO2を用いた低消費電力トランジスタ・メモリ技術の新展開, Poster award in the Workshop on LSI and System, 電子情報通信学会 ICD
Winner: Masaharu Kobayashi, Yusaku Tagawa, Fei Mo, Toshiro Hiramoto
 
Jul 2018
Negative Capacitance for Booting Tunnel FET Performance, Best paper award, IEEE Nanotechnology Council
Winner: Masaharu Kobayashi, Kyungmin Jang, Nozomu Ueyama, Toshiro Hiramoto
 
Feb 2013
14nm SOI technology development, Outstanding contribution award, IBM
 

Education

 
Sep 2006
 - 
Jan 2010
Electrical Engineering, Stanford University
 
Apr 2004
 - 
Mar 2006
Electrical Engineering, The University of Tokyo
 
Apr 2000
 - 
Mar 2004
Electronics and Information Engineering, Liberal arts/School of Engineering, The University of Tokyo
 

Patents

 
特許US9034748B2 : Process variability tolerant hard mask for replacement metal gate finFET devices
Christopher V. Baiocco,Kevin K. Chan,Young-Hee Kim, Masaharu Kobayashi,Effendi Leobandung,Fei Liu,Dae-Gyu Park, Helen Wang, Xinhui Wang,Min Yang
特許US10068967B2 : Self-forming spacers using oxidation
K. K. Chan, M. Kobayashi, E. Leobandung
特許US9711416B2 : Fin field effect transistor including a strained epitaxial semiconductor shell
K. K. Chan, Y. –H. Kim, M. Kobayashi, J. Li, D. –G. Park
特許US9418846B1 : Selective dopant junction for a group III-V semiconductor device
K. K. Chan, M. J. P. Hopstaken, Y. –H. Kim, M. Kobayashi, E. Leobandung, D. A. Neumayer, D. –G. Park, U. Rana, T. –L Tai
特許US9054192B1 : Integration of Ge-containing fins and compound semiconductor fins
K. K. Chan, C. –W. Cheng, Y. –H. Kim, M. Kobayashi, E. Leobandung, D. –G. Park, D. K. Sadana
特許US8987800B2 : Semiconductor structures with deep trench capacitor and methods of manufacture
K. K. Chan, S. K. Kanakasabapathy, B. A. Khan, M. Kobayashi, E. Leobandung, T. E. Standaert, X. Wang
特許US8889541B1 : Reduced short channel effect of III-V field effect transistor via oxidizing aluminum-rich underlayer
C. –W. Cheng, S. –J. Han, M. Kobayashi, K. –T. Lee, D. Sadana, K. –T. Shiu
特許US8835266B2 : Method and structure for compound semiconductor contact
N. E. S. Cortes, D. Kiewra, M. Kobayashi, K. –T. Shiu
特許US8941147B2 : Transistor formation using cold welding
C. –W. Cheng, S. –J. Han, M. Kobayashi, K. –T. Lee, D. K. Sadana, K. –T. Shiu
特許US8524614B2 : III-V compound semiconductor material passivation with crystalline interlayer
K. –T. Shiu, D. Guo, S. –J. Han, E. Kiewra, M. Kobayashi