Masaharu Kobayashi

Profile Information

Affiliation: The University of Tokyo

Degree: 電子工学専攻(Stanford大学)

J-GLOBAL ID: 201601012444697255
researchmap Member ID: 7000018566

External link: http://nano-lsi.iis.u-tokyo.ac.jp/

Research Interests

Research Areas

Manufacturing technology (mechanical, electrical/electronic, chemical engineering) / Electrical power engineering / Integrated device
Manufacturing technology (mechanical, electrical/electronic, chemical engineering) / Electronic devices and equipment / Memory device
Manufacturing technology (mechanical, electrical/electronic, chemical engineering) / Electronic devices and equipment / CMOS transistor

Research History

Oct, 2019 - Present

The University of Tokyo
May, 2014 - Present

Associate Professor, Institute of Industrial Science, The University of Tokyo
Apr, 2019 - Sep, 2019

VLSI (Very Scale Integration Large) Design and Education Center, The University of Tokyo
Feb, 2010 - Apr, 2014

Research Staff Member, Watson Research Center, IBM corporation
Sep, 2006 - Jan, 2010

Ph.D degree, Stanford University
Jun, 2009 - Sep, 2009

Visiting Researcher, IMEC
Apr, 2006 - Aug, 2006

Post master researcher, Institute of Industrial Science, The University of Tokyo
Apr, 2004 - Mar, 2006

Master, Institute of Industrial Science, The University of Tokyo
Apr, 2000 - Mar, 2004

Bachelor, The University of Tokyo

Papers

342

A Nanosheet Oxide Semiconductor FET Using ALD InGaOx Channel for 3-D Integrated Devices

Kaito Hikake, Zhuo Li, Junxiang Hao, Chitra Pandy, Takuya Saraya, Toshiro Hiramoto, Takanori Takahashi, Mutsunori Uenuma, Yukiharu Uraoka, Masaharu Kobayashi

IEEE Transactions on Electron Devices, 1-7, 2024
Nondestructive imaging of breakdown process in ferroelectric capacitors using in situ laser-based photoemission electron microscopy

Hirokazu Fujiwara, Yuki Itoya, Masaharu Kobayashi, Cédric Bareille, Shik Shin, Toshiyuki Taniuchi

Applied Physics Letters, 123(17), Oct 23, 2023
A Nanosheet Oxide Semiconductor FET Using ALD InGaOx Channel and InSnOx Electrode with Normally-off Operation, High Mobility and Reliability for 3D Integrated Devices

Kaito Hikake, Zhuo Li, Junxiang Hao, Chitra Pandy, Takuya Saraya, Toshiro Hiramoto, Takanori Takahashi, Mutsunori Uenuma, Yukiharu Uraoka, Masaharu Kobayashi

2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), Jun 11, 2023
Monolithic 3D Integration and 3D-Memory Technology Enabled by Oxide-Semiconductor

Masaharu Kobayashi

Apr 17, 2023 InvitedLead author
三次元集積デバイス応用に向けた原子層堆積法で成膜した三元系非晶質酸化物半導体In-Ga-O

高橋崇典, 上沼睦典, 小林正治, 浦岡行治

2022年第70回応用物理学会春季学術講演会，上智大学, 17p-E302-7, Mar 17, 2023
強誘電体トンネル接合の電荷トラップ影響シミュレーション

金在顕, 更屋拓哉, 平本俊郎, 小林正治

2022年第70回応用物理学会春季学術講演会，上智大学, 16p-A403-9, Mar 16, 2023 Last author
UV-LEDを用いたHfO2系強誘電体キャパシタのアニールプロセス省電力化に関する研究

山田裕貴, 古江悟, 横森岳彦, 糸矢祐喜, 更屋拓哉, 平本俊郎, 小林正治

2022年第70回応用物理学会春季学術講演会，上智大学, 16p-A403-7, Mar 16, 2023 Last author
3D NAND Memory Operation of Oxide-Semiconductor Channel FeFETs

Junxiang Hao, Xiaoran Mei, Takuya Saraya, Toshiro Hiramoto, Masaharu Kobayashi

2022年第70回応用物理学会春季学術講演会，上智大学, 16p-A403-6, Mar 16, 2023 Last author
レーザー励起光電子顕微鏡を用いたHfO2系強誘電体キャパシタの絶縁破壊に関する評価

糸矢祐喜, 藤原弘和, Bareille Cédric,辛埴, 谷内敏之, 小林正治

2022年第70回応用物理学会春季学術講演会，上智大学, 15p-A404-7, Mar 15, 2023 Last author
強誘電特性評価可能なオペランドレーザー励起光電子顕微鏡の開発

藤原弘和, 糸矢祐喜, 小林正治, Bareille Cédric,辛埴, 谷内敏之

2022年第70回応用物理学会春季学術講演会，上智大学, 15p-A404-6, Mar 15, 2023
Energy-Efficient Annealing Process of HfO2-Based Ferroelectric Capacitor Using UV-LED for Green Manufacturing

Hirotaka Yamada, Satoru Furue, Takehiko Yokomori, Yuki Itoya, Takuya Saraya, Toshiro Hiramoto, Masaharu Kobayashi

IEEE Electron Devices Technology and Manufacturing (EDTM) 2023, Seoul, Korea, 40F-3, Mar 9, 2023 Peer-reviewedLast author
3D NAND Memory Operation of Oxide-Semiconductor Channel FeFETs and the Potential Impact of In-Plane Polarization

Junxiang Hao, Xiaoran Mei, Takuya Saraya, Toshiro Hiramoto, Masaharu Kobayashi

IEEE Electron Devices Technology and Manufacturing (EDTM) 2023, Seoul, Korea, 26F-1, Mar 8, 2023 Peer-reviewedLast author
Device modeling of oxide–semiconductor channel antiferroelectric FETs using half-loop hysteresis for memory operation

Xingyu Huang, Yuki Itoya, Zhuo Li, Takuya Saraya, Toshiro Hiramoto, Masaharu Kobayashi

Japanese Journal of Applied Physics, 62 SC1024, Jan 18, 2023 Peer-reviewedLast author
Pixel-Parallel Three-Layer Stacked CMOS Image Sensors Using Double-Sided Hybrid Bonding of SOI Wafers

Masahide Goto, Yuki Honda, Masakazu Nanba, Yoshinori Iguchi, Takuya Saraya, Masaharu Kobayashi, Eiji Higurashi, Hiroshi Toshiyoshi, Toshiro Hiramoto

IEEE Transactions on Electron Devices, 70(9) 4705-4711, 2023
次世代強誘電体と酸化物半導体で切り拓くメモリデバイス技術

小林正治

応用電子物性分科会研究例会，オンライン, Dec 20, 2022 InvitedLead author
Thermally Stable Ternary Amorphous Oxide Semiconductors for HfO<sub>2</sub>-based Ferroelectric Field-Effect Transistor Memories

Takanori Takahashi, Mutsunori Uenuma, Masaharu Kobayashi, Yukiharu Uraoka

Proceedings of the International Display Workshops, 226-226, Dec 15, 2022
A c-axis crystalline IGZO FET and a 0.06-um2 HfO2-based Capacitor 1T1C FeRAM with High Voltage and 10-ns Write Time

M. Endo, S. Numata, K. Ohshima, Y. Egi, F. Isaka, T. Ohno, S. Tezuka, T. Hamada, K. Furutani, K. Tsuda …

International Electron Devices Meeting (IEDM), San Francisco, 134-137, Dec 5, 2022 Peer-reviewed
酸化物半導体を用いた三次元集積メモリデバイスの研究動向

小林正治

薄膜材料デバイス研究会第19回研究集会，オンライン, Nov 17, 2022 InvitedLead author
Mesoscopic-scale grain formation in HfO2-based ferroelectric thin films and its impact on electrical characteristics

Masaharu Kobayashi, Jixuan Wu, Yoshiki Sawabe, Saraya Takuya, Toshiro Hiramoto

Nano Convergence, 9(1), Nov 12, 2022 Peer-reviewedInvitedLead author
HfO2系強誘電体と酸化物半導体を用いた新規メモリデバイス～酸化物半導体はスパッタからALDへ

小林正治

NEDIA第9回電子デバイスフォーラム，京都, Oct 25, 2022 InvitedLead author

Research Projects

酸化物半導体と強誘電体HfO2の融合による三次元集積デバイスとその応用技術の創出

科学研究費助成事業基盤A, 日本学術振興会, Apr, 2021 - Mar, 2024
超低電力ニューロモルフィックハードウェア基盤技術のブレークスルー

科学研究費助成事業基盤A, 日本学術振興会, Apr, 2021 - Mar, 2024
ナノスケール強誘電体トランジスタの研究開発と機械学習アクセラレータへの応用

日本-台湾研究交流「AIシステム構成に資するナノエレクトロニクス技術」, JST, Apr, 2020 - Mar, 2023
原子層ヘテロ構造の完全制御成長と超低消費電力・３次元集積デバイスの創出

CREST, 科学技術振興機構(JST), Apr, 2019 - Mar, 2022

宮田耕充
Research and development of nanosheet wireless probe enabling multiple and simultaneous probe for neuron activity signal and neurotransmitter

Grant-in-Aid for Scientific Research(B), Japan Society for the Promotion of Science, Apr, 2018 - Mar, 2021

Toshinori Fujie
Exploratory research on ultralow power system based on CMOS compatible ferroelectric devices

Grant-in-Aid for Scientific Research(B), Japan Society for the Promotion of Science, Apr, 2018 - Mar, 2021

Masaharu Kobayashi
ストレージメモリおよび人工知能ハードウェア応用に向けた強誘電体HfO2トンネル接合メモリのマルチスケールモデリング

東芝メモリ奨励研究, 東芝メモリ, Oct, 2018 - Sep, 2019

小林正治
Research and development of steep subthreshold slope transistor by using negative capacitance effect and its applications

PRESTO, Japan Science and Technology Agency (JST), Oct, 2015 - Mar, 2019

Masaharu Kobayashi
Research and development of ferroelectric HfO2 tunnel junction memory for ultralow power operation based on atomic scale modeling and simulation

Research funding, CASIO SCIENCE PROMOTION FOUNDATION, Jan, 2018 - Dec, 2018

Masaharu Kobayashi
Research and Development of design guideline of ferroelectric HfO2 tunnel junction memory atomic scale based on atomic scale modeling and simulation

Research funding, The Murata Science Foundation, Jul, 2017 - Jun, 2018

Masaharu Kobayashi
Design and demonstration of ultralow power circuit of steep slope transistor and embedded FeRAM by ferroelectric HfO2

Grant-in-Aid for Young Scientists(B),, Japan Society for the Promotion of Science, Apr, 2016 - Mar, 2018

Masaharu Kobayashi
Ultra-Low Voltage Operating Silicon Nanowire Transistors with Threshold Voltage Self-Adjusting Mechanism

Grants-in-Aid for Scientific Research, Grant-in-Aid for Challenging Exploratory Research, Japan Society for the Promotion of Science, Apr, 2015 - Mar, 2017

Hiramoto Toshiro, Masaharu Kobayashi, Takuya Saraya

Professional Memberships

Committee Memberships

Apr, 2019 - Present

JJAP/APEX論文編集委員, 応用物理学会
Apr, 2018 - Present

技術調査専門委員会, 電気学会
Apr, 2018 - Present

幹事, IEEE Electron Device Society (EDS) Japan Joint Chapter
Apr, 2018 - Present

サブコミッティー, IEEE International Electron Device Meeting (IEDM)
Apr, 2017 - Present

プログラム編集委員, 応用物理学会
Apr, 2015 - Present

ELEX論文編集委員, 電子情報通信学会
Apr, 2015 - Present

プログラム委員, VLSI technology symposium
Apr, 2015 - Present

論文委員, International Conference on Solid State Devices and Materials (SSDM)
Apr, 2014 - Present

幹事, 学振165委員会
Jun, 2015 - Jun, 2019

論文編集委員, 電子情報通信学会
Sep, 2017 - Sep, 2018

実行委員, International Conference on Solid State Devices and Materials (SSDM)

Awards

Feb, 2024

IEEE EDS Japan Joint Chapter Student Award, A Nanosheet Oxide Semiconductor FET Using ALD InGaOx Channel and InSnOx Electrode with Normally-Off Operation, High Mobility and Reliability for 3D Integrated Devices, IEEE EDS Japan Joint Chapter

Kaito Hikake
Dec, 2023

Leo Esaki Award, Efficient Erase Operation by GIDL Current for 3D Structure FeFETs With Gate Stack Engineering and Compact Long-Term Retention Model, IEEE EDS

Fei Mo, Jiawen Xiang, Xiaoran Mei, Yoshiki Sawabe, Takuya Saraya, Toshiro Hiramoto, Chun-Jung Su, Vita Pi-Ho Hu, Masaharu Kobayashi
Dec, 2022

IEEE EDS Paul Rappaport Award, Monolithic Integration of Oxide Semiconductor FET and Ferroelectric Capacitor Enabled y Sn-Doped InGaZnO for 3-D Embedded RAM Application, IEEE EDS

Hiroshi Goto, Masaharu Kobayashi
Aug, 2021

Best Student Paper Award, Experimental Demonstration of HfO2-based Ferroelectric FET with MoS2 Channel for High-Density and Low-Power Memory Application, Silicon Nano Workshop

Jiawen Xiang
Dec, 2020

IEEE EDS Leo Esaki Award, Ferroelectric HfO2 Tunnel Junction Memory with High TER and Multi-level Operation Featuring Metal Replacement Process, IEEE EDS

Masaharu Kobayashi, Yusaku Tagawa, Fei Mo, Takuya Saraya, Toshiro Hiramoto
Nov, 2020

キオクシア奨励研究デバイス部門優秀研究賞, ストレージメモリおよび人工知能ハードウェア応用に向けた強誘電体HfO2トンネル接合メモリのマルチスケールモデリング, キオクシア

小林正治
Apr, 2020

The Young Scientist Award of the year of 2020, Research on innovative transistor and memory technologies based on next generation ferroelectric materials, Ministry of Education, Culture, Sports, Science and Technology

Masaharu Kobayashi
Mar, 2020

令和元年度丸文研究奨励賞を受賞, HfO2系強誘電体を用いた次世代集積回路素子の研究, 丸文財団
Feb, 2020

IEEE EDS Japan Chapter Student Award, "Experimental Demonstration of Ferroelectric HfO2 FET with Ultrathin-body IGZO for High-Density and Low-Power Memory Application", IEEE EDS Japan Joint Chapter

Fei Mo
Feb, 2020

IEEE EDS Japan Chapter Student Award(2/7), "Transient Negative Capacitance as Cause of Reverse Drain-induced Barrier Lowering and Negative Differential Resistance in Ferroelectric FETs", IEEE EDS Japan Joint Chapter

Chenji Jin
May, 2019

Poster award in the Workshop on LSI and System, 強誘電体HfO2を用いた低消費電力トランジスタ・メモリ技術の新展開, 電子情報通信学会 ICD

Masaharu Kobayashi, Yusaku Tagawa, Fei Mo, Toshiro Hiramoto
Mar, 2019

第46回（2019年春季）応用物理学会講演奨励賞(3/10), Polarization Switching as the Cause of Steep Subthreshold Slope in Ferroelectric FETs, 応用物理学会

Chengji Jin
Jan, 2019

IEEE EDS Japan Chapter Student Award 2, Scalability Study on Ferroelectric-HfO2 Tunnel Junction Memory Based on Non-equilibrium Green Function Method with Self-consistent Potential, IEEE EDS Japan Joint Chapter

Fei Mo
Jan, 2019

IEEE EDS Japan Chapter Student Award, Experimental Study on the Role of Polarization Switching in Subthreshold Characteristics of HfO2-based Ferroelectric and Anti-ferroelectric FET, IEEE EDS Japan Joint Chapter

Chengji Jin
Jul, 2018

Best paper award, Negative Capacitance for Booting Tunnel FET Performance, IEEE Nanotechnology Council

Masaharu Kobayashi, Kyungmin Jang, Nozomu Ueyama, Toshiro Hiramoto
Feb, 2013

Outstanding contribution award, 14nm SOI technology development, IBM

Masaharu Kobayashi

Education

Sep, 2006 - Jan, 2010

Electrical Engineering, Stanford University
Apr, 2004 - Mar, 2006

Electrical Engineering, The University of Tokyo
Apr, 2000 - Mar, 2004

Electronics and Information Engineering, Liberal arts/School of Engineering, The University of Tokyo

Industrial Property Rights

特願2022-149329 不揮発性記憶素子

小林, 李, 平本
特許US9034748B2 Process variability tolerant hard mask for replacement metal gate finFET devices

Christopher V. Baiocco, Kevin, K. Chan, Young-Hee Kim, Masaharu Kobayashi, Effendi Leobandung, Fei Liu, Dae-Gyu Park, Helen Wang, Xinhui Wang, Min Yang
特許US8524614B2 III-V compound semiconductor material passivation with crystalline interlayer

K. –T. Shiu, D. Guo, S. –J. Han, E. Kiewra, M. Kobayashi
特許US8941147B2 Transistor formation using cold welding

C. –W. Cheng, S. –J. Han, M. Kobayashi, K. –T. Lee, D. K. Sadana, K, –T. Shiu
特許US8835266B2 Method and structure for compound semiconductor contact

N. E, S. Cortes, D. Kiewra, M. Kobayashi, K. –T. Shiu
特許US8889541B1 Reduced short channel effect of III-V field effect transistor via oxidizing aluminum-rich underlayer

C. –W. Cheng, S. –J. Han, M. Kobayashi, K. –T. Lee, D. Sadana, K. –T. Shiu
特許US8987800B2 Semiconductor structures with deep trench capacitor and methods of manufacture

K. K. Chan, S. K. Kanakasabapathy, B. A. Khan, M. Kobayashi, E. Leobandung, T. E. Standaert, X. Wang
特許US9054192B1 Integration of Ge-containing fins and compound semiconductor fins

K. K. Chan, C. –W. Cheng, Y. –H. Kim, M. Kobayashi, E. Leobandung, D. –G. Park, D. K. Sadana
特許US9418846B1 Selective dopant junction for a group III-V semiconductor device

K. K. Chan, M. J, P. Hopstaken, Y. –H. Kim, M. Kobayashi, E. Leobandung, D. A. Neumayer, D. –G. Park, U. Rana, T. –L Tai
特許US9711416B2 Fin field effect transistor including a strained epitaxial semiconductor shell

K. K. Chan, Y. –H. Kim, M. Kobayashi, J. Li, D. –G. Park
特許US10068967B2 Self-forming spacers using oxidation

K. K. Chan, M. Kobayashi, E. Leobandung

Misc.

SOIウェハのハイブリッド接合を用いた画素並列3層積層CMOSイメージセンサ—Pixel-Parallel 3-Layer Stacked CMOS Image Sensors Using Hybrid Bonding of SOI Wafers

後藤正英, 本田悠葵, 難波正和, 井口義則, 更屋拓哉, 小林正治, 日暮栄治, 年吉洋, 平本俊郎

「センサ・マイクロマシンと応用システム」シンポジウム論文集電気学会センサ・マイクロマシン部門 [編], 39 5p, Nov, 2022
SOIウェハのハイブリッド接合を用いた3層積層画素並列CMOSイメージセンサ—3-Layer Stacked Pixel-Parallel CMOS Image Sensors Using Hybrid Bonding of SOI Wafers—情報センシング

後藤正英, 本田悠葵, 難波正和, 井口義則, 更屋拓哉, 小林正治, 日暮栄治, 年吉洋, 平本俊郎

映像情報メディア学会技術報告 = ITE technical report, 46(14) 5-8, Mar, 2022
Multi-Layer Stacking Technology for Pixel-Parallel CMOS Image Sensors by Using Room-Temperature Wafer Bonding

後藤正英, 中谷真規, 本田悠葵, 渡部俊久, 難波正和, 井口義則, 更屋拓哉, 小林正治, 日暮栄治, 年吉洋 …

映像情報メディア学会冬季大会講演予稿集(CD-ROM), 2020, 2020
3次元構造撮像素子の高集積化に向けた直接接合による多層積層技術

本田悠葵, 後藤正英, 渡部俊久, 難波正和, 井口義則, 更屋拓哉, 小林正治, 日暮栄治, 年吉洋, 平本俊郎

映像情報メディア学会年次大会講演予稿集(CD-ROM), 2019, 2019
招待講演強誘電体HfO₂を用いた負性容量トランジスタの動作速度に関する実験検討 (シリコン材料・デバイス)

小林正治, 上山望, 蔣京珉, 平本俊郎

電子情報通信学会技術研究報告 = IEICE technical report : 信学技報, 116(445) 51-54, Jan 30, 2017
招待講演 Experimental Study on Polarization-Limited Operation Speed of Negative Capacitance FET with Ferroelectric HfO₂ (シリコン材料・デバイス)

小林正治, 上山望, 蔣京珉, 平本俊郎

電子情報通信学会技術研究報告 = IEICE technical report : 信学技報, 116(448) 9-12, Jan 30, 2017
3次元構造撮像デバイスの画素内A/D変換回路に適用可能なイベントドリブン型雑音除去回路の開発—Development of Event-Driven Noise Reduction Circuits for In-Pixel A/D Converters Integrated in 3-D Integrated CMOS Image Sensors—第9回集積化MEMSシンポジウム

後藤正英, 本田悠葵, 渡部俊久, 萩原啓, 難波正和, 井口義則, 更屋拓哉, 小林正治, 日暮栄治, 年吉洋 …

「センサ・マイクロマシンと応用システム」シンポジウム論文集電気学会センサ・マイクロマシン部門 [編], 34 4p, 2017
3次元構造撮像デバイスの微細・高集積化に向けた直接接合による多層積層技術—Three-Layered Stacking Process by Au/SiO2 Hybrid Bonding for 3D Structured Image Sensors—第9回集積化MEMSシンポジウム

本田悠葵, 後藤正英, 渡部俊久, 萩原啓, 難波正和, 井口義則, 更屋拓哉, 小林正治, 日暮栄治, 年吉洋 …

「センサ・マイクロマシンと応用システム」シンポジウム論文集電気学会センサ・マイクロマシン部門 [編], 34 1-4, 2017
Development of Three-Dimensional Integrated CMOS Image Sensors with Pixel-Parallel Signal Processors by Using Direct Bonding of SOI Layers

116(335) 17-21, Nov 29, 2016
Development of Three-Dimensional Integrated CMOS Image Sensors with Pixel-Parallel Signal Processors by Using Direct Bonding of SOI Layers

116(334) 17-21, Nov 29, 2016
Development of Three-Dimensional Integrated CMOS Image Sensors with Pixel-Parallel Signal Processors by Using Direct Bonding of SOI Layers

116(333) 17-21, Nov 29, 2016
画素並列信号処理を行うSOI積層型3次元構造撮像デバイスの試作と評価—Fabrication and Evaluation of Three-Dimensional Integrated CMOS Image Sensors with Pixel-Parallel Signal Processing using Stacked SOI Layers—第7回集積化MEMSシンポジウム

後藤正英, 萩原啓, 井口義則, 大竹浩, 更屋拓哉, 小林正治, 日暮栄治, 年吉洋, 平本俊郎

「センサ・マイクロマシンと応用システム」シンポジウム論文集電気学会センサ・マイクロマシン部門 [編], 32 1-4, Oct, 2015
Device Design Guideline for negative capacitance FET (NCFET)

115(190) 15-18, Aug 24, 2015
CI-4-7 Low Voltage and Low Power Devices by Threshold Voltage Control

Proceedings of the IEICE General Conference, 2015(2) "SS-100", Feb 24, 2015
Three-Dimensional Integrated CMOS Image Sensors with Pixel-Parallel A/D Converters Fabricated by Direct Bonding of SOI Layers

GOTO Masahide, HAGIWARA Kei, IGUCHI Yoshinori, OHTAKE Hiroshi, SARAYA Takuya, KOBAYASHI Masaharu, HIGURASHI Eiji, TOSHIYOSHI Hiroshi, HIRAMOTO Toshiro

Technical report of IEICE. SDM, 114(421) 25-28, Jan 27, 2015
Three-Dimensional Integrated CMOS Image Sensors with Pixel-Parallel Signal Processors

GOTO Masahide, HAGIWARA Kei, IGUCHI Yoshinori, OHTAKE Hiroshi, SARAYA Takuya, KOBAYASHI Masaharu, HIGURASHI Eiji, TOSHIYOSHI Hiroshi, HIRAMOTO Toshiro

ITE Technical Report, 39 5-8, 2015

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Professional Memberships

Committee Memberships

Awards

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Industrial Property Rights

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