2017年11月2日
A study on parasitic inductance reduction design in GaN-based power converter for high-frequency switching operation
2017 International Symposium on Electromagnetic Compatibility - EMC EUROPE 2017, EMC Europe 2017
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- 記述言語
- 掲載種別
- 研究論文(国際会議プロシーディングス)
- DOI
- 10.1109/EMCEurope.2017.8094824
© 2017 IEEE. This report studies the influence of printed circuit board (PCB) design on voltage overshoot and ringing oscillation in switching operation of gallium nitride gate injection transistor (GaN-GIT) for high-frequency DC-DC converter. The parasitic inductances in the main power loop have been identified based on moment of method (MoM) analysis and frequency characteristics of impedance measured with 2-port shunt-thru method. The measured switching characteristics of GaN-GIT in a 5 MHz DC-DC boost converter shows that a small-ESL ceramic capacitor connected across the DC-link can reduce the effective power loop inductances and can improve both voltage overshoot and the damping of ringing oscillation.
- リンク情報
- ID情報
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- DOI : 10.1109/EMCEurope.2017.8094824
- SCOPUS ID : 85040540873