2015年
Evaluation of Automatic Power Reduction with OSCAR Compiler on Intel Haswell and ARM Cortex-A9 Multicores
LANGUAGES AND COMPILERS FOR PARALLEL COMPUTING (LCPC 2014)
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- 巻
- 8967
- 号
- 開始ページ
- 239
- 終了ページ
- 252
- 記述言語
- 英語
- 掲載種別
- 研究論文(国際会議プロシーディングス)
- DOI
- 10.1007/978-3-319-17473-0_16
- 出版者・発行元
- SPRINGER-VERLAG BERLIN
Reducing power dissipation without performance degradation is one of the most important issues for all computing systems, such as supercomputers, cloud servers, desktop PCs, medical systems, smartphones and wearable devices. Exploiting parallelism, careful frequency-and-voltage control and clock-and-power-gating control for multicore/manycore systems are promising to attain performance improvements and reducing power dissipation. However, the hand parallelization and power reduction of application programs are very difficult and time-consuming. The OSCAR automatic parallelization compiler has been developed to overcome these problems by realizing automatic low-power control in addition to the parallelization. This paper evaluates performance of the low-power control technology of the OSCAR compiler on Intel Haswell and ARM multicore platforms. The evaluations show that the power consumption is reduced to 2/5 using 3 cores on the Intel Haswell multicore for the H. 264 decoder and 1/3 for Optical Flow on 3 cores with the power control compared with 3 cores without power control. On the ARM Cortex-A9 using 3 cores, the power control reduces power consumption to 1/2 with the H. 264 decoder and 1/3 with Optical Flow. These show that the OSCAR multi-platform compiler allows us to reduce the power consumption on Intel and ARM multicores.
- リンク情報
- ID情報
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- DOI : 10.1007/978-3-319-17473-0_16
- ISSN : 0302-9743
- Web of Science ID : WOS:000362494500016