KAWAHARA Takayuki

J-GLOBAL         Last updated: Nov 28, 2019 at 04:04
 
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Name
KAWAHARA Takayuki
URL
https://www.tus.ac.jp/en/fac/p/index.php?69ac
Affiliation
Tokyo University of Science
Section
Tokyo University of Science, Faculty of Engineering, Department of Electrical Engineering
Job title
Professor
Degree
Doctor of Philosophy in Engineering(Kyushu University)

Profile

Takayuki Kawahara, 河原尊之, is a Professor in the department of Electrical Engineering at Tokyo University of Science (東京理科大学 or Rika-dai), Katsushika, Japan.

Sustainable Electronics is the theme of his laboratory, which includes post-CMOS and memory-centric circuits, biomedical-signal sensor and processing, and spin-current application (memory, power generation).

In a career spanning of 29 years in the company, prior to that, he achieved the following results:
- Circuitry for DNA sequencer (statistical nano-pore and fast ISFET array) in early 10's
- STT-RAM application for green computing (instant On/Off) in late 00's
- World's first fully-functional 2Mb STT-RAM proto chip design (and 32Mb) in mid-00's
- Leakage-curent reduction for peta-scale performance super-computer in mid-00's
- Led various PJ(SoC, SRAM, multi-bit flash-memory, and sensor net) as a unit leader in early 00's
- Strategy planning for SoC business in late 90's
- World's first 128Mb flash-memory proto chip design in mid-90's
- Low-voltage and low-power circuits design; pioneering leakage current reduction demonstration, proposal and proof of charge-recycle circuitry in early 90's, and thin-BOX FD-SOI with back-gate bias in early 00's
- High-speed BiCMOS memory design (World's first 1Mb BiCMOS DRAM, 4Mb) in mid-80's

Research Areas

 
 

Academic & Professional Experience

 
1985
 - 
1990
Research Staff Member, Hitachi Central Research Laboratory (HCRL)
 
1990
 - 
1996
Researcher, HCRL
 
1996
 - 
1998
Senior Researcher, HCRL
 
1997
 - 
1998
Visiting Researcher, Swiss Federal Institute of Technology Lausanne (EPFL)
 
1998
 - 
1999
Senior Engineer, Hitachi System LSI Development Center
 
1999
 - 
2005
Unit Leader (Senior Researcher), HCRL
 
2005
 - 
2014
Chief Researcher, HCRL
 
2014
   
 
Professor, Electrical Engineering, Tokyo University of Science
 

Education

 
 
 - 
1983
Department of Physics, Faculty of Science, Kyushu University
 
 
 - 
1985
Department of Physics, Graduate School, Division of Natural Science, Kyushu University
 

Committee Memberships

 
May 2017
 - 
Mar 2018
IEEE Industrial Electronics Society (IES)  IEEE Fellow Evaluation Committee Member
 
May 2016
 - 
May 2016
5th International Symposium on Next-Generation Electronics  Session Chair
 
Apr 2015
 - 
Feb 2016
IEEE International Solid-State Circuits Conference (ISSCC)  Forum Oversee Committee member
 
Apr 2014
 - 
Feb 2015
IEEE International Solid-State Circuits Conference (ISSCC)  Forum selection committee member
 
Apr 2013
 - 
Feb 2014
IEEE International Solid-State Circuits Conference (ISSCC)  Student Research Preview (SRP) committee member
 

Awards & Honors

 
Apr 2017
Prizes for Science and Technology, Development Category, by the Minister of Education, Culture, Sports, Science and Technology
 
Oct 2015
NVMTS 2015 Best Poster Award
 
Sep 2014
IEICE Electronics Society Award (IEICE: The Institute of Electronics, Information and Communication Engineers)
 
Apr 2010
IEEE Service Award
 
Nov 2009
The Yamazaki-Teiichi Prize
 

Published Papers

 
T. Kawahara, K. Ito, R. Takemura, and H. Ohno
MICROELECTRONICS RELIABILITY   52(4) 613-627   Apr 2012   [Refereed]
T. Kawahara, R. Takemura , K. Miura, J. Hayakawa , S. Ikeda , Y. Lee , R. Sasaki , Y. Goto, K. Ito, T. Meguro, F. Matsukura, H. Takahashi, H. Matsuoka, and H. Ohno
IEEE JOURNAL OF SOLID-STATE CIRCUITS   43(1) 109-120   Jan 2008   [Refereed]
R. Takemura, T. Kawahara, K. Miura, H. Yamamoto, J. Hayakawa, N. Matsuzaki, K. Ono, M. Yamanouchi, K. Ito, H. Takahashi, S. Ikeda, H. Hasegawa, H. Matsuoka, and H. Ohno
IEEE JOURNAL OF SOLID-STATE CIRCUITS   45(4) 869-879   Apr 2010   [Refereed]
K. Ono, Y. Yanagawa, A. Kotabe, R. Takemura, T. Nakagawa, T. Iwasaki, and T. Kawahara
IEICE TRANSACTIONS ON ELECTRONICS   E95-C(4) 651-660   Apr 2012   [Refereed]
Y. Nakagome, M. Horiguchi, T. Kawahara, and K. Itoh
IBM JOURNAL OF RESEARCH AND DEVELOPMENT   47(5/6) 525-552   Sep 2003   [Refereed]

Misc

 
Tzi-Dar Chiueh, Toru Shimizu, Gregory Chen, Chen Yi Lee, Charles Hsu, Tihao Chiang, Zhihua Wang, Junghwan Choi, Jongwoo Lee, Yasumoto Tomita, Takayuki Kawahara
2014 IEEE Asian Solid-State Circuits Conference (A-SSCC)   389-394   Nov 2014
Betty Prince, Takayuki Kawahara
IEEE Solid-State Circuits Magazine   2(1) 49-51   Jan 2010
Takayuki Kawahara
IEEE International School and Seminar on Modern Problems of Nanoelectronics, Micro- and Nanosystem Technologies (INTERNANO), Tutorial   160-185   Oct 2009

Books etc

 
Green Computing with Emerging Memory: Low-Power Computation for Social Innovation
Takayuki Kawahara, Hiroyuki Mizuno (Eds.) (Part:Joint Work)
Springer   Sep 2012   ISBN:ISBN 978-1-4614-0811
Chapter 10: "Case Study: Leakage Reduction in Hitachi/Renesas Microprocessors," in Leakage in Nanometer CMOS Technologies, S. G. Narendra and A. Chandrakasan eds.
M. Miyazaki, H. Mizuno, and T. Kawahara (Part:Joint Work)
Springer   Dec 2005   ISBN:ISBN 978-0-387-28133
Chapter 7: "Memory Leakage Reduction," in Leakage in Nanometer CMOS Technologies, S. G. Narendra and A. Chandrakasan eds.
T. Kawahara and K. Itoh (Part:Joint Work)
Springer   Dec 2005   ISBN:ISBN 978-0-387-28133

Conference Activities & Talks

 
Effectiveness of Synchronization and Cooperative Behavior of Multiple Robots Based on Swarm AI
Tatsuya Hiejima, Shun Kawashima, Mengnan Ke, Takayuki Kawahara
IEEE 15th of the annual Asia Pacific Conference on Circuits and Systems (APCCAS 2019)   13 Nov 2019   
Machine Learning Classification Methods Using Data of 3-Axis Acceleration Sensors Equipped with Wireless Communication Means for Locating Wooden House Structural Damage
Ryota Tanida, Atsushi Yamamoto, Noriaki Takahashi, Natsuhiko Sakiyama, Sakuya Kishi, Takayuki Kishimoto, So Hasegawa, Kenjiro Mori, Yoichiro Hashizume, Jing Ma, Takashi Nakajima, Mikio Hasegawa, Takahiro Yamamoto, Takumi Ito, Takayuki Kawahara
IEEE 15th of the annual Asia Pacific Conference on Circuits and Systems (APCCAS 2019)   13 Nov 2019   
High-speed Sparse Ising Model on FPGA
Akira Minamisawa, Ryoma Iimura, Takayuki Kawahara
62nd IEEE International Midwest Symposium on Circuits and Systems (MWSCAS 2019)   6 Aug 2019   
Material dependence of the effect of SOT-MRAM read disturb reduction method
Keisuke Tabata, Takayuki Kawahara
応用物理学会春季学術講演会   11 Mar 2019   
An Evaluation of Wooden House Health Monitoring System using PVDF Piezoelectric Sensor with 3-layer Neural Network and Inverted Binary-Data Augmentation
Noriaki Takahashi, Natsuhiko Sakiyama, Takuji Yamamoto, Sakuya Kishi, Yoichiro Hashizume, Takashi Nakajima, Takahiro Yamamoto, Mikio Hasegawa, Takumi Ito, Takayuki Kawahara
IEEE 17th World Symposium on Applied Machine Intelligence and Informatics (SAMI 2019)   25 Jan 2019