論文

2000年12月1日

A 60MHz 240mW MPEG-4 video-phone LSI with 16Mb embedded DRAM

Digest of Technical Papers - IEEE International Solid-State Circuits Conference
  • T. Nishikawa
  • M. Takahashi
  • M. Hamada
  • T. Takayanagi
  • H. Arakida
  • N. Machida
  • H. Yamamoto
  • T. Fujiyoshi
  • Y. Matsumoto
  • O. Yamagishi
  • T. Samata
  • A. Asano
  • T. Terazawa
  • K. Ohmori
  • J. Shirakura
  • Y. Watanabe
  • H. Nakamura
  • S. Minami
  • T. Kuroda
  • T. Furuyama
  • 全て表示

開始ページ
230
終了ページ
231

The fabrication of a 240 m W single-chip MPEG-4 video-phone LSI with a 16 Mb embedded dynamic random access storage (DRAM) was discussed. The device integrated camera, display and audio interfaces and employed threshold voltage complementary metal oxide semiconductor CMOS (VTCMOS) technology to reduce standby leakage currents. The embedded DRAM reduced the power dissipation for input/output circuit and for the interface between external DRAM and the processors. The results indicated that the power-on-shunt circuit did not dissipate power after power-up.

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URL
http://www.scopus.com/inward/record.url?partnerID=HzOxMe3b&scp=0034428239&origin=inward
ID情報
  • ISSN : 0193-6530
  • SCOPUS ID : 0034428239

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