2021年1月18日
A DSM-based Polar Transmitter with 23.8% System Efficiency
Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
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- 開始ページ
- 291
- 終了ページ
- 296
- 記述言語
- 掲載種別
- 研究論文(国際会議プロシーディングス)
- DOI
- 10.1145/3394885.3431653
- 出版者・発行元
- ACM
An energy efficient digital polar transmitter (TX) based on 1.5bit Delta-Sigma modulator (DSM) and fractional-N injection-locked phase-locked loop (IL-PLL) is proposed. In the proposed TX, redundant charge and discharge of turnedoff capacitors in the conventional switched-capacitor power amplifiers (SCPAs) are avoided, which drastically improves the efficiency at power back-off. In the PLL, spur-mitigation technique is proposed to reduce the frequency mismatch between the oscillator and the reference. The transmitter, implemented in 65nm CMOS, achieves a PAE of 29% at an EVM of -25.1dB, and a system efficiency of 23.8%.
- リンク情報
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- DOI
- https://doi.org/10.1145/3394885.3431653
- DBLP
- https://dblp.uni-trier.de/rec/conf/aspdac/ZhangLGWSO21
- Scopus
- https://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=85100596926&origin=inward
- Scopus Citedby
- https://www.scopus.com/inward/citedby.uri?partnerID=HzOxMe3b&scp=85100596926&origin=inward
- URL
- https://dblp.uni-trier.de/rec/conf/aspdac/2021
- URL
- https://dblp.uni-trier.de/db/conf/aspdac/aspdac2021.html#ZhangLGWSO21
- ID情報
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- DOI : 10.1145/3394885.3431653
- ISBN : 9781450379991
- DBLP ID : conf/aspdac/ZhangLGWSO21
- SCOPUS ID : 85100596926