浅見哲也 (tetsuya asami) - マイポータル

基本情報

J-GLOBAL ID: 202401000196786568
researchmap会員ID: R000070628

研究キーワード

研究分野

論文

A Study of the CMOS Image Sensor Semiconductor Business: Factors Maintaining the Long- Term Manufacturing Technology Superiority of IDM Companies

Tetsuya Asami, Masaharu Tsujimoto

2020 International Symposium on Semiconductor Manufacturing (ISSM) 2020年12月15日査読有り筆頭著者
Suppression of crosstalk by using backside deep trench isolation for 1.12&#x03BC;m backside illuminated CMOS image sensor

Y. Kitamura, H. Aikawa, K. Kakehi, T. Yousyou, K. Eda, T. Minami, S. Uya, Y. Takegawa, H. Yamashita, Y. Kohyama …

2012 International Electron Devices Meeting 2012年12月査読有り
Suppression of NBTI-induced VMIN shifts using hafnium doping to gate poly/SiON interface and optimized NiPt process for 40nm node SRAM cell

Y. Kitamura, T. Sanuki, K. Matsuo, T. Shimizu, A. Ohta, Y. Arayashiki, H. Fukui, T. Hoshino, Y. Ueki, A. Yasumoto …

2010 Symposium on VLSI Technology 2010年6月査読有り
Compact model for layout dependent variability

H. Aikawa, T. Sanuki, A. Sakata, E. Morifuji, H. Yoshimura, T. Asami, H. Otani, H. Oyamatsu

2009 IEEE International Electron Devices Meeting (IEDM) 2009年12月査読有り
Advanced yield enhancement methodology for SoCs

Tetsuya Asami

IEEE/SEMI Advanced Semiconductor Manufacturing 2004年5月査読有り筆頭著者
A 1 mu A retention 4 Mb SRAM with a thin-film-transistor load cell

S. Hayakawa, M. Kakumu, H. Takeuchi, K. Sato, T. Ohtani, T. Yoshida, T. Nakayama, S. Morita, M. Kinugawa, K. Maeguchi …

1990 37th IEEE International Conference on Solid-State Circuits 1990年査読有り
A 30- mu A data-retention pseudostatic RAM with virtually static RAM mode

K. Sawada, T. Sakurai, K. Nogami, K. Sato, T. Shirotori, M. Kakuma, S. Morita, M. Kinugawa, T. Asami, K. Narita …

IEEE Journal of Solid-State Circuits 23(1) 12-19 1988年2月査読有り
1-Mbit virtually static RAM

K. Nogami, T. Sakurai, K. Sawada, T. Wada, K. Sato, M. Isobe, M. Kakumu, S. Morita, S. Yokogawa, M. Kinugawa …

IEEE Journal of Solid-State Circuits 21(5) 662-669 1986年10月査読有り