2007年11月
FPGA implementation of EASI algorithm
IEICE ELECTRONICS EXPRESS
- ,
- ,
- 巻
- 4
- 号
- 22
- 開始ページ
- 707
- 終了ページ
- 711
- 記述言語
- 英語
- 掲載種別
- 研究論文(学術雑誌)
- DOI
- 10.1587/elex.4.707
- 出版者・発行元
- IEICE-INST ELECTRONICS INFORMATION COMMUNICATIONS ENG
Using chaotic signals, we evaluate the performance of the EASI (Equivariant Adaptive Separation via Independence) algorithm, which is a basic algorithm among various on-line ICA ( Independent Component Analysis) algorithms. We found that the EASI algorithm in fixed-point (16-bit) arithmetic can recover the chaotic signals successfully as well as the algorithm in floating-point arithmetic. We can implement the algorithm in. xed- point arithmetic to Virtex-IV SX25 FPGA ( Field Programmable Gate Arrays) up to the 4x4 design.
- リンク情報
- ID情報
-
- DOI : 10.1587/elex.4.707
- ISSN : 1349-2543
- CiNii Articles ID : 130000088523
- Web of Science ID : WOS:000252844700004