論文

査読有り
2010年4月

Scheduling for input-queued packet switches by a re-configurable parallel match evaluator.

IEEE Communications Letters
  • Spiridon F. Beldianu
  • ,
  • Roberto Rojas-Cessa
  • ,
  • Eiji Oki
  • ,
  • Sotirios G. Ziavras

14
4
開始ページ
357
終了ページ
359
記述言語
英語
掲載種別
研究論文(学術雑誌)
DOI
10.1109/LCOMM.2010.04.092440
出版者・発行元
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC

A parallel match evaluator (PE) selects the most productive match for an input-queued (IQ) switch among several tested. However, current PE-based approaches use N fixed permutations out of possible. N!, where N is the number of switch ports. A fixed permutation represents a permanent match between the inputs and outputs. To improve switching performance, this letter proposes a re-configurable PE (RPE) where permutations are selected according to traffic pattern, queue occupancy, or queuing times. This letter shows the performance improvement achieved with the proposed RPE.

リンク情報
DOI
https://doi.org/10.1109/LCOMM.2010.04.092440
DBLP
https://dblp.uni-trier.de/rec/journals/icl/BeldianuROZ10
Web of Science
https://gateway.webofknowledge.com/gateway/Gateway.cgi?GWVersion=2&SrcAuth=JSTA_CEL&SrcApp=J_Gate_JST&DestLinkType=FullRecord&KeyUT=WOS:000276100900029&DestApp=WOS_CPL
URL
https://dblp.uni-trier.de/db/journals/icl/icl14.html#BeldianuROZ10
ID情報
  • DOI : 10.1109/LCOMM.2010.04.092440
  • ISSN : 1089-7798
  • DBLP ID : journals/icl/BeldianuROZ10
  • Web of Science ID : WOS:000276100900029

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