Kuniaki Fujimoto

Profile Information

Affiliation: Tokai University

Degree: Master of Engineering(Mar, 2009, Tokai University)
工学修士(Mar, 1989, 東海大学)

J-GLOBAL ID: 200901078432478383
researchmap Member ID: 1000196421

External link: http://www2.kuma.u-tokai.ac.jp/~kfuji/

Research Interests

Research Areas

Manufacturing technology (mechanical, electrical/electronic, chemical engineering) / Electronic devices and equipment / 回路設計
Informatics / Computer systems / LIS設計技術

Research History

Apr, 2010 - Present

Tokai University
Apr, 2008 - Mar, 2010

Tokai University

Education

Apr, 1987 - Mar, 1989

Graduate School of Engineering, Tokai University
Apr, 1983 - Mar, 1987

Department of Electrical and Electronic Engineering, School of Engineering, Tokai University

Committee Memberships

Apr, 2019 - Present

参与, 熊本県工業連合会
Apr, 2019 - Present

理事, 九州工学教育協会
Apr, 2019 - Present

幹事, くまもと技術革新・融合研究会（RIST）

Awards

Sep, 2017

貢献賞, 日本知能情報ファジィ学会

藤本邦昭
Aug, 2017

Best Paper Award, A Wide Range Manhattan Distance Search Circuit Using Neuron CMOS Inverters

Yujiro Harada, Kuniaki Fujimoto, Kei Eguchi, Masaaki Fukuhara, Masahiro Yoshida
Nov, 2016

貢献賞, バイオメディカル・ファジィ・システム学会

藤本邦昭
Aug, 2015

Contribution Award
Aug, 2015

Excellent Paper Award, A Minimum Manhattan Distance Retrieving Circuit Using Neuron CMOS Inverters

Yujiro Harada, Kuniaki Fujimoto, Masaaki Fukuhara, Masahiro Yoshida
Mar, 2014

Outstanding Paper Award, A Study on Flash Type A/D Converter Using Neuron CMOS Inverter

Yujiro Harada, Kuniaki Fujimoto, Mitsutoshi Yahara, KeiEguchi
Mar, 2013

第4回ユニーク・自作チップコンテストinひびきの優秀賞, スイッチとカレントを用いた可変分周回路, 財団法人北九州産業芸術推進機構

原田裕次郎, 児玉純, 藤本邦昭, 矢原充敏
Feb, 2011

第2回ユニーク・自作チップコンテストinひびきの最優秀賞, ニューロンCMOSインバータを用いたAD変換回路, 財団法人北九州産業芸術推進機構

深江太郎, 廣瀬貴規, 藤本邦昭, 矢原充敏, 佐々木博文, 石岩
Feb, 2011

第2回ユニーク・自作チップコンテストinひびきの優秀賞, ブートスラップ回路による電圧制御発振器, 財団法人北九州産業芸術推進機構

廣瀬貴規, 深江太郎, 藤本邦昭, 矢原充敏, 佐々木博文, 石岩
Oct, 2009

第1回ユニーク・自作チップコンテストinひびきの最優秀賞, 電圧制御多相クロック発振回路, 財団法人北九州産業芸術推進機構

廣瀬貴規, 藤本邦昭, 矢原充敏, 佐々木博文, 石岩

Papers

111

DESIGN OF FREQUENCY MULTIPLIER BASED ON DOUBLE-EDGE COUNTER AND ITS ANALYSIS

Daishi Nishiguchi, Mitsutoshi Yahara, Yujiro Harada, Masaaki Fukuhara, Kuniaki Fujimoto

ICIC Express Letters, Part B: Applications, 15(1) 35-42, Jan, 2024
A STUDY OF A MINIMUM EUCLIDEAN DISTANCE SEARCH CIRCUIT FOR AN ASSOCIATIVE MEMORY

Yujiro Harada, Yoshiki Katoda, Masaki Fukuhara, Daishi Nishiguchi, Kuniaki Fujimoto

ICIC Express Letters, 17(10) 1111-1118, Aug, 2023
DIGITAL FREQUENCY-LOCKED LOOP WITH WIDE LOCK-IN RANGE AND LOW FREQUENCY ERROR BASED ON MULTI-PHASE CLOCK

Mitsutoshi Yahara, Kuniaki Fujimoto, Daishi Nishiguchi, Yujiro Harada, Masaaki Fukuhara

International Journal of Innovative Computing, Information and Control, 18(6) 1979-1988, Dec, 2022
APPROACHES TO REMOTE LEARNING DURING COVID-19 IN THE SCHOOL OF INDUSTRIAL AND WELFARE ENGINEERING, TOKAI UNIVERSITY

Kuniaki Fujimoto, Mitsutoshi Yahara, Miku Fujimoto

ICIC Express Letters, Part B: Applications, 13(7) 689-696, Jul, 2022
An Electronic Neuron Using Interconnect Capacitance and Applied to a Variable Logic Circuit

NISHIGUCHI Daishi, FUKUHARA Masaaki, YAHARA Mitsutoshi, FUJIMOTO Kuniaki

電子情報通信学会論文誌 C(Web), J105-C(4) 129-130, Apr 1, 2022
DIGITAL FREQUENCY-LOCKED LOOP WITH LOW FREQUENCY ERROR BASED ON MULTI-PHASE CLOCK

Mitsutoshi Yahara, Kuniaki Fujimoto, Daishi Nishiguchi, Yujiro Harada, Masaaki Fukuhara

ICIC Express Letters, 16(2) 159-167, Feb, 2022
A Study of Digitally Controlled Oscillator Based on Multi-Phase Clock

Yahara Mitsutoshi, Fujimoto Kuniaki, Nishiguchi Daishi

IEEJ Transactions on Electronics, Information and Systems, 141(7) 840-841, Jul 1, 2021
Digital frequency-locked loop based on double-edge counter

Mitsutoshi Yahara, Kuniaki Fujimoto, Daishi Nishiguchi, Yujiro Harada

ICIC Express Letters, Part B: Applications, 12(5) 427-434, 2021
Detection of Land Cover Changes before and after the 2016 Kumamoto Earthquake in Japan Using Remote Sensing for Evaluation of Environmental Impacts

Yoichiro Iwasaki, Tomoko Tamaki, Kouhei Murata, Ariya Koga, Kuniaki Fujimoto

IOP Conference Series: Earth and Environmental Science, 581(1), Dec 4, 2020
Multiple output of similarity data by recalling type associative memory using neuron CMOS inverter

Toyoki Saho, Yujiro Harada, Masaaki Fukuhara, Kuniaki Fujimoto

ICIC Express Letters, Part B: Applications, 11(11) 1095-1104, Nov, 2020
Analysis by fpd for neuron CMOS variable logic circuit with fg calibration

Riku Ohtsuka, Hayato Yagi, Masaaki Fukuhara, Kuniaki Fujimoto

ICIC Express Letters, 14(10) 985-992, Oct, 2020
A flash type a/d converter using neuron cmos inverters with threshold compensation circuits

Yujiro Harada, Mitsutoshi Yahara, Kei Eguchi, Kuniaki Fujimoto

ICIC Express Letters, 14(3) 251-258, 2020
A reset type 2-mode digital fll with anti-pseudo-lock function and phase control

Mitsutoshi Yahara, Kuniaki Fujimoto, Daishi Nishiguchi

ICIC Express Letters, Part B: Applications, 10(10) 903-910, Oct, 2019
Voltage characteristics of a hamming distance search circuit in voltage domain using clocked neuron cmos inverter

Takanori Kurano, Nao Onji, Masaaki Fukuhara, Yujiro Harada, Kuniaki Fujimoto

ICIC Express Letters, 13(3) 209-216, 2019
A 1+n/k frequency divider unrelated to duty ratio of multi-phase clock

Mitsutoshi Yahara, Kuniaki Fujimoto

IEEJ Transactions on Electronics, Information and Systems, 139(7) 843-844, 2019
A digitally controlled oscillator using 1+1/k frequency divider based on multi-phase clock

Mitsutoshi Yahara, Kuniaki Fujimoto, Hideo Kiyota, Daishi Nishiguchi, Yujiro Harada

ICIC Express Letters, Part B: Applications, 9(12) 1233-1240, Dec, 2018
Multiple-frequency digital phase-locked loop based on multiphase clock divider with constant pulse interval

Mitsutoshi Yahara, Kuniaki Fujimoto, Hideo Kiyota

ELECTRONICS AND COMMUNICATIONS IN JAPAN, 101(7) 40-47, Jul, 2018
Short-circuit-current reduction by using a clocked neuron cmos inverter in a time-domain data coincidence detector

Masaaki Fukuhara, Nao Onji, Takanori Kurano, Tasuku Nakajima, Yujiro Harada, Kuniaki Fujimoto, Masahiro Yoshida

ICIC Express Letters, Part B: Applications, 9(6) 477-484, Jun, 2018
A WIDE RANGE MANHATTAN DISTANCE SEARCH CIRCUIT USING NEURON CMOS INVERTERS

Yujiro Harada, Kuniaki Fujimoto, Kei Eguchi, Masaaki Fukuhara, Masahiro Yoshida

INTERNATIONAL JOURNAL OF INNOVATIVE COMPUTING INFORMATION AND CONTROL, 14(1) 161-170, Feb, 2018
Multiple frequency digital phase-locked loop based on multi-phase clock divider with constant pulse interval

Mitsutoshi Yahara, Kuniaki Fujimoto, Hideo Kiyota

IEEJ Transactions on Electronics, Information and Systems, 138(4) 387-394, 2018

Misc.

Land Cover Change Detection before and after the 2016 Kumamoto Earthquake Using Remote Sensing

Record of Joint Conference of Electrical and Electronics Engineers in Kyushu, 2019 63-64, Sep 19, 2019
ファジィ推論を応用したPLLの設計試作に関する研究(3)

佐々木博文, 藤本邦昭, 石岩

九州東海大学産業技術研究所所報, (20) 43-52, 2004
ファジィ推論を応用したPLLの設計試作に関する研究

佐々木博文, 藤本邦昭, 石岩

九州東海大学産業技術研究所所報, (18) 1-11, 2002
高齢化社会に対応した低コストホームオートメーションシステムに関する研究

高山秀造, 藤本邦昭, 佐々木博文

九州東海大学産業技術研究所所報, (16) 1-13, 2000
LON(ロ-カルオペレ-ティングネットワ-ク)を用いた制御システムに関する研究

佐々木博文, 藤本邦昭, 清田英夫

九州東海大学産業技術研究所所報, (12) 31-42, 1996
Synthesis of Quaternary Tow-Stage Minimal Negative Gate Networks and it Tests

FUJIMOTO Kuniaki, SASAKI Hirofumi, NAGAYOSHI Masaaki, ODAKA Akio

Proceedings of the IEICE General Conference, 1995 107-107, Mar 27, 1995

Books and Other Publications

ゼロからはじめるVisual C#入門 : 基礎とアプリケーション作成

藤本, 邦昭

森北出版, Sep, 2018 (ISBN: 9784627818415)
ゼロからはじめるVisual Basic入門 : 基礎からゲーム作成まで

藤本, 邦昭

森北出版, Aug, 2012 (ISBN: 9784627849914)
ゼロからはじめるVisual Basic.NET入門 : 基礎からゲーム作成まで

藤本, 邦昭

森北出版, Jun, 2005 (ISBN: 4627845510)
ディジタル電子回路入門

鈴木, 八十二, 佐々木, 博文, 藤本, 邦昭, 吉田, 正廣

日刊工業新聞社, Aug, 2003 (ISBN: 4526051659)

Presentations

Land Cover Change Detection before and after the 2016 Kumamoto Earthquake Using Remote Sensing

Record of Joint Conference of Electrical and Electronics Engineers in Kyushu, 2019, Committee of Joint Conference of Electrical, Electronics and Information Engineers in Kyushu
A-1-22 A Study on Dividing Circuit with Multi-Phase Input Clocks

Fujimoto Kuniaki, Shibuya Takashi, Yahara Mitsutoshi, Sasaki Hirofumi

Proceedings of the IEICE General Conference, Mar 8, 2006, The Institute of Electronics, Information and Communication Engineers
A Study on Dividing Ratio Changeable m Multiplication Circuit with Delay Circuit.

Yahara Mitsutoshi, Fujimoto Kuniaki, Sasaki Hirofumi

Record of Joint Conference of Electrical and Electronics Engineers in Kyushu, 2005, Committee of Joint Conference of Electrical, Electronics and Information Engineers in Kyushu
A-1-12 A Study on Analog Digital Mixed PLL

Fujimoto Kuniaki, Sasaki Hirofumi, Kojima Daisaku, Shi Yan

Proceedings of the IEICE General Conference, Mar 8, 2004, The Institute of Electronics, Information and Communication Engineers
Dividing Ratio Changeable All Digital Phase Locked Loop with Low Jitter

Sasaki Hirofumi, Fujimoto Kuniaki, Yahara Mitsutoshi, Masaoka Yohichiroh

Record of Joint Conference of Electrical and Electronics Engineers in Kyushu, 2004, Committee of Joint Conference of Electrical, Electronics and Information Engineers in Kyushu
A Proposition on Reset Type Fast Pull-in PLL Using Frequency difference

SASAKI Hirofumi, FUJIMOTO Kuniaki, YAHARA Mitsutoshi, Murshed M.M.

Proceedings of the IEICE General Conference, Mar 7, 2000, The Institute of Electronics, Information and Communication Engineers
A Proposition on Multiple Frequency Digital PLL Using Fractional Divider

SASAKI Hirofumi, YAHARA Mitsutoshi, FUJIMOTO Kuniaki, MURANAKA Shinsaku

Proceedings of the IEICE General Conference, 2000, The Institute of Electronics, Information and Communication Engineers
A Proposition on Digital FLL using pulse counter

SASAKI Hirofumi, YAHARA Mitsutoshi, FUJIMOTO Kuniaki, KUBOTA Toshiomi

Jun 24, 1999
A proposal for a non-pseudo-locked FLL

YAHARA Mitsutoshi, SASAKI Hirofimi, FUJIMOTO Kuniaki

May 5, 1999
A Proposition on Digital PLL using pulse counter

SASAKI Hirofumi, YAHARA Mitsutoshi, FUJIMOTO Kuniaki, KUBOTA Toshiomi

Proceedings of the IEICE General Conference, Mar 8, 1999, The Institute of Electronics, Information and Communication Engineers
A Proposal on Pulse Train Arithmetic Circuits Using Switched-Current

SASAKI Hirofumi, FUJIMOTO Kuniaki, INOUE Yoshifumi, YAHARA Mitsutoshi

Apr 8, 1998
A Proposal on Pulse Train Multiplier Circutis Using Switched-Capacitor.

SASAKI Hirofumi, FUJIMOTO Kuniaki, YAHARA Mitsutoshi, INOUE Yoshifumi

Proceedings of the IEICE General Conference, Mar 6, 1998, The Institute of Electronics, Information and Communication Engineers
A study of digital locked loop on pulse number count system

SASAKI Hirofumi, YAHARA Mitsutoshi, FUJIMOTO Kuniaki, NAKAI Makoto

Proceedings of the IEICE General Conference, 1998, The Institute of Electronics, Information and Communication Engineers
A Proposal on Pulse number Arithmetic Circuits Using Switched-Capacitor

SASAKI Hirofumi, FUJIMOTO Kuniaki, YAHARA Mitsutoshi

Jun 20, 1997
A proposition on Noisie-less DC-AC Converter using Switched Capacitor Circuits

Sasaki Hirofumi, Fuzimoto Kuniaki, Takaki Yoshihiro, Oota Ichirou, Ueno Fumio

Proceedings of the IEICE General Conference, Mar 6, 1997, The Institute of Electronics, Information and Communication Engineers
CMOS Ternary Cycling Circuits ang Ternary D-Iatch Circuits

FUJIMOTO Kuniaki, SASAKI Hirofumi, OYOBE Toyoharu, ODAKA Akio

Proceedings of the IEICE General Conference, Mar 11, 1996, The Institute of Electronics, Information and Communication Engineers

Professional Memberships

Research Projects

A Study on a Low Power Variable Logic Circuit Using Neuron CMOS Inverters

Grants-in-Aid for Scientific Research Grant-in-Aid for Scientific Research (C), Grant-in-Aid for Scientific Research (C), Japan Society for the Promotion of Science, Apr, 2022 - Mar, 2025
Associative Memory Using Neuron CMOS Inverters

Grants-in-Aid for Scientific Research Grant-in-Aid for Scientific Research (C), Grant-in-Aid for Scientific Research (C), Japan Society for the Promotion of Science, Apr, 2015 - Mar, 2018

FUJIMOTO KUNIAKI, YAHARA Mitsutoshi
High-Speed and Low Power Consumption AD Converter Using Neuron MOSFET

Grants-in-Aid for Scientific Research Grant-in-Aid for Scientific Research (C), Grant-in-Aid for Scientific Research (C), Japan Society for the Promotion of Science, Apr, 2012 - Mar, 2015

FUJIMOTO Kuniaki, YAHARA Mitsutoshi

Industrial Property Rights

特開2015-139103 可変分周器

藤本邦昭
特開2013-038546 ニューロンＣＭＯＳ回路及びニューロンＣＭＯＳ回路を備える電子回路

藤本邦昭
特許4899215 電圧制御発振器および電圧制御発振方法

佐々木博文, 藤本邦昭, 矢原充敏
特許4984284 電圧制御発振器および電圧制御発振方法

佐々木博文, 矢原充敏, 藤本邦昭

Profile Information

Research Interests

Research Areas

Research History

Education

Committee Memberships

Awards

Papers

Misc.

Books and Other Publications

Presentations

Professional Memberships

Research Projects

Industrial Property Rights

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