GAUTHIER Lovic

J-GLOBAL         Last updated: Aug 12, 2019 at 22:36
 
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Name
GAUTHIER Lovic
Nickname
lovic
Affiliation
Ariake National College of Technology
Section
Department of Creative Engineering(InformationSystems)
Job title
Associate professor
Degree
Ph.D.(INPG (France))

Research Areas

 

Academic & Professional Experience

 
Apr 2013
 - 
Today
Associate professor, National Institute of Technology, Ariake College
 
Jan 2013
 - 
Mar 2013
Academic researcher, Research Institute for Information Technology, Kyushu University
 
Apr 2009
 - 
Dec 2012
Appointed associate professor, Faculty of Information Science and Electrical Engineering, Kyushu University
 
Apr 2007
 - 
Mar 2009
Appointed researcher, ISIT
 
Jan 2003
 - 
Mar 2007
Researcher, Fukuoka IST
 

Education

 
Sep 1998
 - 
Dec 2001
Ph.D., Microelectronics, Institut National Polytechnique de Grenoble, France (University)
 
Sep 1995
 - 
Aug 1998
Engineer school ( Grande École), École Nationale Supérieur d'Électricité et de Radioélectricité de Grenoble, France
 
Sep 1997
 - 
Jul 1998
Master degree, Informatics, Université Joseph Fourier, Grenoble, France
 

Awards & Honors

 
Mar 2017
IoT application development framework Plato, 9th Fukuoka Ruby Grand Prize mruby Special Award, Contents Business Promotion Council of Fukuoka Prefecture
Winner: SCSK Kyushu Co., Ltd., Kyushu Institute of Technology, Ariake National College of Technology, Giga Farm Co., Ltd.
 
2011
Implementation of stack data placement and run time management using a scratch-pad memory for energy consumption reduction of embedded applications, Best paper award, IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
 
2010
Placing static and stack data into a scratch-pad memory for reducing the energy consumption of multi-task applications, Outstanding paper award, Workshop on Synthesis and System Integration of Mixed Information Technologies (SASIMI)
Winner: Lovic Gauthier, Tohru Ishihara, Hideki Takase, Hiroyuki Tomiyama, Hiroaki Takada
 

Published Papers

 
A Verilog Backend for the New Hardware Description Language HDLRuby
Sho Kogawa, Hiroya Kitahara, Lovic Gauthier
The 2nd Education and Research International Workshop of Electronic Devices, Circuits, Illuminations, and Systems      Dec 2018
Evaluation of the Productivity of the New Hardware Description Language HDLRuby
Hiroya Kitahara, Sho Kogawa , Lovic Gauthier
The 2nd Education and Research International Workshop of Electronic Devices, Circuits, Illuminations, and Systems      Dec 2018
A Study on the Training Data Creation focused on Expert System “AI-Q”
Takuro Noguchi, Yasutomo Hashizume, Hideaki Moriyama, Lovic Gauthier, Yohei Ishikawa, Tetsuya Matsuno and Akira Suganuma
Proceedings of the 5th International Conference on Business and Industrial Research (ICBIR2018)      May 2018   [Refereed]
HDLRuby, a new High Productivity Hardware Description Language
Lovic Gauthier, Yōhei Ishikawa
Proceedings of the 5th International Conference on Business and Industrial Research (ICBIR2018)      May 2018   [Refereed]
Introduction to the Endowed “Chair of Business in Artificial Intelligence Field” in NIT, Ariake College
Takuro Noguchi, Yasutomo Hashizume, Hideaki Moriyama, Lovic Gauthier, Yohei Ishikawa, Tetsuya Matsuno and Akira Suganuma
ICAEME2017   177-178   Aug 2017   [Refereed]
High Speed Cycle-Accurate Processor Simulation Through Ahead of Time Compilation
GAUTHIER Lovic
The 20th Workshop on Synthesis and System Integration of Mixed Information Technologies (SASIMI'16)   195-200   Oct 2016   [Refereed]
TAKASE Hideki, ZENG Gang, GAUTHIER Lovic, KAWASHIMA Hirotaka, ATSUMI Noritoshi, TATEMATSU Tomohiro, KOBAYASHI Yoshitake, KOSHIRO Takenori, ISHIHARA Tohru, TOMIYAMA Hiroyuki, TAKADA Hiroaki
IEICE Trans Fundam Electron Commun Comput Sci (Web)   E97.A(12) 2477-2487 (J-STAGE)-2487   2014
This paper presents a framework for reducing the energy consumption of embedded real-time systems. We implemented the presented framework as both an optimization toolchain and an energy-aware real-time operating system. The framework consists of t...
Lovic Gauthier,Shinya Ueno,Koji Inoue
International Conference on Compilers, Architecture and Synthesis for Embedded Systems, CASES 2013, Montreal, QC, Canada, September 29 - October 4, 2013   10:1-10:10   2013   [Refereed]
Lovic Gauthier,Tohru Ishihara
J. Electrical and Computer Engineering   2012 786943:1-786943:16   2012   [Refereed]
Efficient barrier synchronization for 2D meshed NoC-based many-core processors
GAUTHIER Lovic, Farhad Mehdipour, Koji Inoue, Shinya Ueno, Hiroshi Sasaki
The 17th Workshop on Synthesis and System Integration of Mixed Information Technologies (SASIMI'12)      2012   [Refereed]
GAUTHIER Lovic, ISHIHARA Tohru
IEICE Trans Fundam Electron Commun Comput Sci (Inst Electron Inf Commun Eng)   E94-A(12) 2597-2608 (J-STAGE)-2608   Dec 2011
Memory accesses are a major cause of energy consumption for embedded systems. This paper presents the implementation of a fully software technique which places stack and static data into a scratch-pad memory (SPM) in order to reduce the energy con...
Farhad Mehdipour,Krishna Chaitanya Nunna,Lovic Gauthier,Koji Inoue,Kazuaki Murakami
2011 IEEE International 3D Systems Integration Conference (3DIC), Osaka, Japan, January 31 - February 2, 2012   1-4   2011   [Refereed]
TAKASE Hideki, ZENG Gang, GAUTHIER Lovic, KAWASHIMA Hirotaka, ATSUMI Noritoshi, TATEMATSU Tomohiro, KOBAYASHI Yoshitake, KOHARA Shunitsu, KOSHIRO Takenori, ISHIHARA Tohru, TOMIYAMA Hiroyuki, TAKADA Hiroaki
Proc Int Symp Low Power Electron Des   2011 271-276   2011
Lovic Gauthier,Tohru Ishihara,Hideki Takase,Hiroyuki Tomiyama,Hiroaki Takada
Proceedings of the 2010 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2010, Scottsdale, AZ, USA, October 24-29, 2010   157-166   2010   [Refereed]
Placing static and stack data into a scratch-pad memory for reducing the energy consumption of multi-task applications
Lovic Gauthier, Tohru Ishihara, Hideki Takase, Hiroyuki Tomiyama, Hiroaki Takada
The 16th Workshop on Synthesis and System Integration of Mixed Information Technologies (SASIMI'10)   7-12   2010   [Refereed]
Compiler assisted energy reduction techniques for embedded multimedia processors
Lovic Gauthier, Tohru Ishihara
The 2nd APSIPA Annual Summit and Conference   27-36   2010   [Refereed]
Lovic Gauthier,Tohru Ishihara
Proceedings of the 7th IEEE/ACM/IFIP Workshop on Embedded Systems for Real-Time Multimedia, ESTIMedia 2009, Grenoble, France, 15-16 October 2009   116-125   2009   [Refereed]
Antoine Trouvé,Lovic Gauthier,Takayuki Kando,Benoit Ryder,Sebastien Pouzols,Pradeep Rao,Norifumi Yoshimatsu,Kazuaki Murakami
ReConFig'09: 2009 International Conference on Reconfigurable Computing and FPGAs, Cancun, Quintana Roo, Mexico, 9-11 December 2009, Proceedings   231-236   2009   [Refereed]
Victor M. Goulart Ferreira,Lovic Gauthier,Takayuki Kando,Takuma Matsuo,Toshihiko Hashinaga,Kazuaki Murakami
Proceedings of the 19th Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2006, Ouro Preto, MG, Brazil, August 28 - September 1, 2006   14-19   2006   [Refereed]
Wander O. Cesário,Lovic Gauthier,Damien Lyonnard,Gabriela Nicolescu,Ahmed Amine Jerraya
Journal of Systems and Software   70(3) 229-244   2004   [Refereed]
Commucation Co-Processor Design by Composition of Parameterized Cells
Vytautas Štuikys, Damien Lyonnard, Wander O. Cesário, Yannick Paviot, Ahmed A. Jerraya, Lovic Gauthier
Information Technology And Control   30(1)    2004   [Refereed]
Wander O. Cesário,Damien Lyonnard,Gabriela Nicolescu,Yanick Paviot,Sungjoo Yoo,Ahmed Amine Jerraya,Lovic Gauthier,Mario Diaz-Nava
IEEE Design & Test of Computers   19(6) 52-63   2002   [Refereed]
Gabriela Nicolescu,Kjetil Svarstad,Wander O. Cesário,Lovic Gauthier,Damien Lyonnard,Sungjoo Yoo,Philippe Coste,Ahmed Amine Jerraya
Technique et Science Informatiques   21(3) 291-314   2002   [Refereed]
Wander O. Cesário,Amer Baghdadi,Lovic Gauthier,Damien Lyonnard,Gabriela Nicolescu,Yanick Paviot,Sungjoo Yoo,Ahmed Amine Jerraya,Mario Diaz-Nava
Proceedings of the 39th Design Automation Conference, DAC 2002, New Orleans, LA, USA, June 10-14, 2002   789-794   2002   [Refereed]
Sungjoo Yoo,Gabriela Nicolescu,Lovic Gauthier,Ahmed Amine Jerraya
2002 Design, Automation and Test in Europe Conference and Exposition (DATE 2002), 4-8 March 2002, Paris, France   620-627   2002   [Refereed]
Génération de système d'exploitation pour le ciblage de logiciel multitâche sur des architectures multiprocesseurs hétérogènes dans le cadre des systèmes embarqués spécifiques
GAUTHIER Lovic
nstitut National Polytechnique de Grenoble-INPG      Dec 2001   [Refereed]
Wander O. Cesário,Gabriela Nicolescu,Lovic Gauthier,Damien Lyonnard,Ahmed Amine Jerraya
IEEE Design & Test of Computers   18(5) 8-20   2001   [Refereed]
Lovic Gauthier,Sungjoo Yoo,Ahmed Amine Jerraya
IEEE Trans. on CAD of Integrated Circuits and Systems   20(11) 1293-1301   2001   [Refereed]
Lovic Gauthier,Sungjoo Yoo,Ahmed Amine Jerraya
Proceedings of the Conference on Design, Automation and Test in Europe, DATE 2001, Munich, Germany, March 12-16, 2001   679-685   2001   [Refereed]
Sungjoo Yoo,Gabriela Nicolescu,Lovic Gauthier,Ahmed Amine Jerraya
Proceedings of the Sixth IEEE International High-Level Design Validation and Test Workshop 2001, Monterey, California, USA, November 7-9, 2001   79-82   2001   [Refereed]
Wander O. Cesário,Gabriela Nicolescu,Lovic Gauthier,Damien Lyonnard,Ahmed Amine Jerraya
12th IEEE International Workshop on Rapid System Prototyping (RSP 2001), 25-27 June 2001, Monterey, CA, USA   110-115   2001   [Refereed]
Lovic Gauthier,Ahmed Amine Jerraya
2000 Design, Automation and Test in Europe (DATE 2000), 27-30 March 2000, Paris, France   742   2000   [Refereed]
Nacer-Eddine Zergainoh,Amer Baghdadi,Ludovic Tambour,Damien Lyonnard,Lovic Gauthier,Ahmed Amine Jerraya
Architecture and Design of Distributed Embedded Systems, IFIP WG10.3/WG10.4/WG10.5 International Workshop on Distributed and Parallel Embedded Systems (DIPES 2000), October 18-19, 2000, Schloß Eringerfeld, Germany   99-110   2000   [Refereed]
Lovic Gauthier,Ahmed Amine Jerraya
Proceedings of the 11th IEEE International Workshop on Rapid System Prototyping (RSP 2000), Paris, France, June 21-23, 2000   60-65   2000   [Refereed]
An XML-based meta-model for the design of multiprocessor embedded systems
Wander Cesario, Lovic Gauthier, Damien Lyonnard, Gabriela Nicolescu, Ahmed Amine Jerraya
VHDL International Users Forum Fall Workshop, 2000   75-82   2000   [Refereed]

Misc

 
Ishikawa Yōhei, Noguchi Takurō, Shimizu Akio, Matsuno Yoshinobu, Gauthier Lovic, Ikegami Katsuya, Ogishima Masumi, Fukai Sumio
FIE-17(17-25) 31-36   Sep 2017
Abe Jōju, Shimomura Mitsuki, Gauthier Lovic, Ikegami Katsuya, Ishikawa Yōhei
電気学会教育フロンティア研究会   FIE-16(17-26) 29-34   Sep 2016
Gauthier Lovic
Research reports of the Ariake Technical College   50(50) 33-39   Oct 2014
UENO Shinya, LOVIC ERIC Gauthier, INOUE Koji, MURAKAMI Kazuaki
Technical report of IEICE. ICD   112(247) 59-64   Oct 2012
Image recognition processing includes a number of filter operations which dominate the total execution time. Exploiting ALU array to accelerate the filter operations is one of the most promising approaches to achieve such energy-efficient executio...
UENO Shinya, LOVIC ERIC Gauthier, INOUE Koji, MURAKAMI Kazuaki
IEICE technical report. Image engineering   112(248) 59-64   Oct 2012
Image recognition processing includes a number of filter operations which dominate the total execution time. Exploiting ALU array to accelerate the filter operations is one of the most promising approaches to achieve such energy-efficient executio...
UENO Shinya, LOVIC ERIC Gauthier, INOUE Koji, MURAKAMI Kazuaki
Technical report of IEICE. VLD   112(245) 59-64   Oct 2012
Image recognition processing includes a number of filter operations which dominate the total execution time. Exploiting ALU array to accelerate the filter operations is one of the most promising approaches to achieve such energy-efficient executio...
UENO Shinya, LOVIC ERIC Gauthier, INOUE Koji, MURAKAMI Kazuaki
IEICE technical report. Signal processing   112(246) 59-64   Oct 2012
Image recognition processing includes a number of filter operations which dominate the total execution time. Exploiting ALU array to accelerate the filter operations is one of the most promising approaches to achieve such energy-efficient executio...
UENO Shinya, LOVIC ERIC Gauthier, INOUE Koji, MURAKAMI Kazuaki
Technical report of IEICE. ICD   111(258) 7-12   Oct 2011
Image recognition used widely in several areas needs high-performance and low power processor. Accelerator is an effective method of high-performance and low-energy. Because conventional accelerator architecture is fixed while features of image re...
UENO Shinya, LOVIC ERIC Gauthier, INOUE Koji, MURAKAMI Kazuaki
IEICE technical report. Image engineering   111(259) 7-12   Oct 2011
Image recognition used widely in several areas needs high-performance and low power processor. Accel-erator is an effective method of high-performance and low-energy. Because conventional accelerator architecture is fixed while features of image r...
上野 伸也, GauthierLovic Eric, 井上 弘士, 村上 和彰
研究報告システムLSI設計技術(SLDM)   2011(2) 1-6   Oct 2011
画像認識用の機器には高性能・低消費エネルギー化が求められており,その手段としてアクセラレータが注目されている.しかしながら,画像認識アプリケーションの特性は多様であり,実行方式が固定されているアクセラレータでは性能が低下する可能性がある.そこで,処理に応じて実行方式を切り換えることが可能な NIMD/MIMD 型アクセラレータ・アーキテクチャを検討する.また,モデルを用いて NIMD/MIMD 型アクセラレータの性能/消費エネルギー評価を行った.その結果,実行方式を MIMD 方式で固定し...
UENO Shinya, LOVIC ERIC Gauthier, INOUE Koji, MURAKAMI Kazuaki
IEICE technical report. Signal processing   111(257) 7-12   Oct 2011
Image recognition used widely in several areas needs high-performance and low power processor. Accelerator is an effective method of high-performance and low-energy. Because conventional accelerator architecture is fixed while features of image re...
Hideki Takase, Gang Zeng, Hirotaka Kawashima, Noritoshi Atsumi, Tomohiro Tatematsu, Lovic Gauthier, Tohru Ishihara, Yoshitake Kobayashi, Shunitsu Kohara, Takenori Koshiro, Hiroyuki Tomiyama, Hiroaki Takada
研究報告システムLSI設計技術(SLDM)   2011(3) 1-6   Mar 2011
This paper presents a framework for the purpose of energy optimization of the embedded systems. Our framework is synthetic, that is, multiple techniques optimize the target application simultaneously. The main technique of our approach is to utili...
TAKASE Hideki, ZENG Gang, KAWASHIMA Hirotaka, ATSUMI Noritoshi, TATEMATSU Tomohiro, GAUTHIER Lovic, ISHIHARA Tohru, KOBAYASHI Yoshitake, KOHARA Shunitsu, KOSHIRO Takenori, TOMIYAMA Hiroyuki, TAKADA Hiroaki
電子情報通信学会技術研究報告   110(474(DC2010 70-81)) 13-18   Mar 2011
This paper presents a framework for the purpose of energy optimization of the embedded systems. Our framework is synthetic, that is, multiple techniques optimize the target application simultaneously. The main technique of our approach is to utili...
GAUTHIER Lovic, ISHIHARA Tohru, TAKADA Hiroaki
情報処理学会シンポジウム論文集   2010(7) 171-176   Aug 2010
HIRAKI Tetsuo, KADOUCHI Shingo, YAMAZAKI Yosuke, KANDO Takayuki, GAUTHIER Lovic, MAURO GOULART FERREIRA Victor, TROUVE Antoine, INOUE Koji, MURAKAMI Kazuaki
IEICE technical report   107(41) 73-78   May 2007
Application specific extensions of a processor provide higher performance. In this paper, the authors propose "Vulcan2" the Application specific processor with dynamically reconfigurable datapath and "ISAcc" Vulcan2's development tool, and demonst...
KANDO TAKAYUKI, GAUTHIER LOVIC, GOULART VICTOR, TROUVE ANTOINE, HIRAKI TETSUO, YAMAZAKI YOSUKE, MURAKAMI KAZUAKI
IPSJ SIG Notes   2007(4) 97-102   Jan 2007
Redefis is a design platform for designing dynamically reconfigurable ASIPs (Application Specific Instruction Set Processors), which are going to be used as engines in future SoCs. The platform consists of the Redefis processor and its SW developm...
KANDO TAKAYUKI, GAUTHIER LOVIC, GOULART VICTOR, TROUVE ANTOINE, HIRAKI TETSUO, YAMAZAKI YOSUKE, MURAKAMI KAZUAKI
情報処理学会研究報告組込みシステム(EMB)   2007(4) 97-102   Jan 2007
Redefis is a design platform for designing dynamically reconfigurable ASIPs (Application Specific Instruction Set Processors), which are going to be used as engines in future SoCs. The platform consists of the Redefis processor and its SW developm...
KANDO TAKAYUKI, GAUTHIER LOVIC, GOULART VICTOR, TROUVE ANTOINE, HIRAKI TETSUO, YAMAZAKI YOSUKE, MURAKAMI KAZUAKI
情報処理学会研究報告. ARC,計算機アーキテクチャ研究会報告   171 97-102   Jan 2007
HASHINAGA Toshihiko, GAUTHIER Lovic, KANDO Takayuki, MAURO GOULART FERREIRA Victor, SUSUKITA Ryutaro, HIRAKI Tetsuo, YAMAZAKI Yosuke, NAGANO Takaaki, MURAKAMI Kazuaki
IEICE technical report. Computer systems   105(516) 7-11   Jan 2006
Application specific extensions of a processor provide higher performance. In this paper, the authors propose "Vulcan" the Application specific processor with dynamically reconfigurable datapath, and demonstrate the efficiency of the proposed proc...
HASHINAGA Toshihiko, GAUTHIER Lovic, KANDO Takayuki, MAURO GOULART FERREIRA Victor, SUSUKITA Ryutaro, HIRAKI Tetsuo, YAMAZAKI Yosuke, NAGANO Takaaki, MURAKAMI Kazuaki
IEICE technical report   105(518) 7-11   Jan 2006
Application specific extensions of a processor provide higher performance. In this paper, the authors propose "Vulcan" the Application specific processor with dynamically reconfigurable datapath, and demonstrate the efficiency of the proposed proc...
HASHINAGA Toshihiko, GAUTHIER Lovic, KANDO Takayuki, MAURO GOULART FERREIRA Victor, SUSUKITA Ryutaro, HIRAKI Tetsuo, YAMAZAKI Yosuke, NAGANO Takaaki, MURAKAMI Kazuaki
Technical report of IEICE. VLD   105(514) 7-11   Jan 2006
Application specific extensions of a processor provide higher performance. In this paper, the authors propose "Vulcan" the Application specific processor with dynamically reconfigurable datapath, and demonstrate the efficiency of the proposed proc...
HASHINAGA Toshihiko, GAUTHIER Lovic, KANDO Takayuki, MAURO GOULART FERREIRA Victor, SUSUKITA Ryutaro, HIRAKI Tetsuo, YAMAZAKI Yosuke, NAGANO Takaaki, MURAKAMI Kazuaki
電子情報通信学会技術研究報告. CPSY, コンピュータシステム   105(516) 61-65   Jan 2006
HASHINAGA Toshihiko, GAUTHIER Lovic, KANDO Takayuki, MAURO GOULART FERREIRA Victor, SUSUKITA Ryutaro, HIRAKI Tetsuo, YAMAZAKI Yosuke, NAGANO Takaaki, MURAKAMI Kazuaki
電子情報通信学会技術研究報告. VLD, VLSI設計技術   105(514) 61-65   Jan 2006
HASHINAGA Toshihiko, GAUTHIER Lovic, KANDO Takayuki, MAURO GOULART FERREIRA Victor, SUSUKITA Ryutaro, HIRAKI Tetsuo, YAMAZAKI Yosuke, NAGANO Takaaki, MURAKAMI Kazuaki
電子情報通信学会技術研究報告. CPSY, コンピュータシステム   105(515) 61-65   Jan 2006
HASHINAGA Toshihiko, GAUTHIER Lovic, KANDO Takayuki, MAURO GOULART FERREIRA Victor, SUSUKITA Ryutaro, HIRAKI Tetsuo, YAMAZAKI Yosuke, NAGANO Takaaki, MURAKAMI Kazuaki
電子情報通信学会技術研究報告. VLD, VLSI設計技術   105(513) 61-65   Jan 2006
MATSUO Takuma, SHUTO Makoto, HASHINAGA Toshihiko, MORIE Yoshiyuki, GAUTHIER Lovic, MURAKAMI Kazuaki
IEICE technical report. Computer systems   104(475) 19-24   Nov 2004
Development environment for "Redefis" platform is reported, which is useful to develop the application on it. A implementation sample with it is shown. This development environment will be able to reconcile the ease of a design for mounting applic...
HASHINAGA Toshihiko, SHUTO Makoto, MATSUO Takuma, MORIE Yoshiyuki, GAUTHIER Lovic, MURAKAMI Kazuaki
IEICE technical report. Computer systems   104(475) 13-18   Nov 2004
Vulcan is an example of a novel SoC design platforms "Redefis". This paper describes Vulcan architecture and the implementation of two applications on Vulcan. Vulcan realize fiexibility and high performance by execution of application specific ins...
SHUTO Makoto, MATSUO Takuma, HASHINAGA Toshihiko, MORIE Yoshiyuki, GAUTHIER Lovic, MURAKAMI Kazuaki
IEICE technical report. Computer systems   104(475) 7-12   Nov 2004
An novel SoC design platforms "Redefis" is proposed and the experimental implementation of Redefis is shown. The high paformance is realized maintaining advantages of software approach by using the platform with a recofigurable hardware
GAUTHIER Lovic, DEVROYE Natasha, TOMIYAMA Hiroyuki, MURAKAMI Kazuaki
情報処理学会研究報告システムLSI設計技術(SLDM)   2002(113) 31-36   Nov 2002
By allowing higher-level descriptions, behavioral synthesis helps to cope with the growing chips' complexity. However, its efficiency has never met the one of RTL synthesis. Our goal is to define a flow that can automatically convert such high-lev...
Gauthier Lovic, Devroye Natasha, Tomiyama Hiroyuki, Murakami Kazuaki
IEICE technical report. Computer systems   102(478) 31-36   Nov 2002
By allowing higher-level descriptions, behavioral synthesis helps to cope with the growing chips' complexity. However, its efficiency has never met the one of RTL synthesis. Our goal is to define a flow that can automatically convert such high-lev...

Books etc

 
Low-Power Electronics Design, chapter 3: Low-Power SoC with Power-Aware Operating Systems Generation
Lovic Gauthier , Aimen Bouchhima , Wander Cesario , Ahmed A . Jerraya , and Sungjoo Yoo (Part:Joint Work, Low-Power Electronics Design, chapter 28)
CRC Press   2004   
Conception des logiciels embarqués pour les systèmes monopuces (French)
GAUTHIER Lovic
Hermes / Lavoisier   Jan 2003   

Conference Activities & Talks

 
Software & RTOS targeting for multiprocessor architectures [Invited]
GAUTHIER Lovic, Ahmed Amine Jerraya
MEDEA Conference on Embedded System Design   2000   

Teaching Experience

 

Works

 
Object code processing library design and implementation in Ruby language
GAUTHIER Lovic   Software   Dec 2016 - Today
Design of the HDLRuby language: a new high productivity hardware description language (Work in progress)
GAUTHIER Lovic   Software   2016 - Today
GAUTHIER Lovic   Educational Materials   Jan 2019 - Feb 2019
GAUTHIER Lovic   Software   Feb 2017 - Apr 2017
Preprocessor in Ruby: provides a Ruby class named Rpp which implements a text preprocessor where macros are specified in Ruby language.

The library is distributed under the MIT license.

Source code available at:
https://github.com/civol/ppr

Ins...
GAUTHIER Lovic   Software   2014 - Dec 2016
LogicTools is a set of command-line tools for processing logic expressions.
The tools include:
simplify_qm for simplifying a logic expression,
simplify_es for simplifying a logic expression much more quickly than simplify_qm,
std_conj for computin...

Research Grants & Projects

 
HDLRuby: a new high productivity hardware description language targeting next generation edge computing architectures for IoT
Japan Society for the Promotion of Science: Grants-in-Aid for Scientific Research
Project Year: Apr 2018 - Mar 2022    Investigator(s): GAUTHIER Lovic

Patents

 
特開JP4390211B2 : Custom lsi development platform, instruction set architecture and method for generating logical circuit configuration information and program
Kōji Hadate, Masao Tanaka, Kazuaki Murakami, Shin Shutō, Lovic Gauthier, Takuma Matsuo, Tetsuya Hasebe, Shūichi Kikuchi, Takashi Hirano
特開US20060242385 A1 : Dynamically reconfigurable processor
Kazuaki Murakami, Makoto Shuto, Lovic Gauthier, Takuma Matsuo, Tetsuya Hasebe, Shuichi Kikuchi

Social Contribution

 
Technical program committee member
[Organizing Member]  The Third International Japan-Egypt Conference on Electronics, Communications and Computers  2015 - Today
Peer reviewer
[Organizing Member]  IEEJ transactions on electrical and electronic engineering (Journal)  2016
Technical program committee member
[Organizing Member]  International conference on Embedded and Ubiquitous Computing  2014 - 2015
Peer reviewer
[Organizing Member]  IEICE Transactions (Journal)  2013
Peer reviewer
[Organizing Member]  Japan-Egypt Conference on Electronics, Communications and Computers  2012