論文

査読有り 国際誌
2022年3月

Printed dual-gate organic thin film transistors and PMOS inverters on flexible substrates: role of top gate electrode

J. Phys. D-Appl. Phys.
  • Subhash Singh
  • ,
  • Hiroyuki Matsui
  • ,
  • Shizuo Tokito

55
13
開始ページ
135105
終了ページ
記述言語
英語
掲載種別
研究論文(学術雑誌)
DOI
10.1088/1361-6463/ac44c2
出版者・発行元
IOP Publishing Ltd

We report printed single and dual-gate organic thin film transistors (OTFTs) and p-channel metal-oxide-semiconductor (PMOS) inverters fabricated on 125 mu m thick flexible polyethylene naphthalate substrate. All the electrodes (gate, source, and drain) are inkjet-printed, while the parylene dielectric is formed by chemical vapor deposition. A dispenser system is used to print the active channel material using a blend of 2,7-dihexyl-dithieno[2,3-d;2 ',3 '-d ']benzo [1,2-b;4,5-b ']dithiophene and polystyrene in tetralin solvent, which gives highest mobility of 0.43 cm(2) V(-1)s(-1). Dual-gate OTFTs are characterized by keeping the other gate electrode either in grounded or floating state. Floating gate electrode devices shows higher apparent mobility and current ratio due to additional capacitance of the parylene dielectric. PMOS inverter circuits are characterized in terms of gain, trip point and noise margin values calculated from the voltage transfer characteristics (VTC). Applied top gate voltage on the load OTFT control the conductivity or threshold voltage (V (Th)) of the bottom TFT and shift the trip point towards the middle of the VTC curve, and hence increase the noise margin.

リンク情報
DOI
https://doi.org/10.1088/1361-6463/ac44c2
Web of Science
https://gateway.webofknowledge.com/gateway/Gateway.cgi?GWVersion=2&SrcAuth=JSTA_CEL&SrcApp=J_Gate_JST&DestLinkType=FullRecord&KeyUT=WOS:000736759700001&DestApp=WOS_CPL
ID情報
  • DOI : 10.1088/1361-6463/ac44c2
  • ISSN : 0022-3727
  • eISSN : 1361-6463
  • Web of Science ID : WOS:000736759700001

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