論文

2020年

Fabrication of 3-layer stacked pixel for pixel-parallel CMOS image sensors by Au/SiO<inf>2</inf> hybrid bonding of SOI wafers

ECS Transactions
  • Masahide Goto
  • Naoki Nakatani
  • Yuki Honda
  • Toshihisa Watabe
  • Masakazu Nanba
  • Yoshinori Iguchi
  • Takuya Saraya
  • Masaharu Kobayashi
  • Eiji Higurashi
  • Hiroshi Toshiyoshi
  • Toshiro Hiramoto
  • 全て表示

98
4
開始ページ
167
終了ページ
171
記述言語
掲載種別
研究論文(国際会議プロシーディングス)
DOI
10.1149/09804.0167ecst

We report 3-layer stacked image sensor pixel designed for pixel-parallel complementary metal-oxide-semiconductor (CMOS) image sensors. Direct bonding of silicon-on-insulator (SOI) wafers with Au electrodes embedded in a SiO2 surface achieves high-density pixel-wise interconnection. By applying the bonding, backside electrode forming, and handle layer removing processes, we have obtained 3-layer stacked wafer without voids or separations. Measurement of prototype 3-layered pixel confirmed linear response of 16-bit digital signal output, demonstrating feasibility of multi-layer devices with functional diversification including circuits, sensors, and More-than-Moore type devices.

リンク情報
DOI
https://doi.org/10.1149/09804.0167ecst
Scopus
https://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=85092740758&origin=inward
Scopus Citedby
https://www.scopus.com/inward/citedby.uri?partnerID=HzOxMe3b&scp=85092740758&origin=inward
ID情報
  • DOI : 10.1149/09804.0167ecst
  • ISSN : 1938-6737
  • eISSN : 1938-5862
  • ISBN : 9781607688990
  • SCOPUS ID : 85092740758

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