HONJO Hiroaki

J-GLOBAL         Last updated: Sep 24, 2019 at 06:18
 
Avatar
Name
HONJO Hiroaki
E-mail
hr-honjocies.tohoku.ac.jp
URL
http://db.tohoku.ac.jp/whois/e_detail/6ec04a8d0b69152c0023466418b70160.html
Affiliation
Tohoku University
Section
Center for Innovative Integrated Electronic Systems Research and Development Division
Job title
Professor
Degree
博士(工学)(Tohoku University), 修士(理学)(Kyushu University)
ORCID ID
0000-0002-5742-108X

Research Interests

 
 

Research Areas

 
 

Awards & Honors

 
Oct 2016
Dry Process Symposium Paper Award, Dry Process Symposium
Winner: Keizo Kinoshita, Hiroaki Honjo, Shunsuke Fukami, Ryusuke Nebashi, Keiichi Tokutome,Michio Murahata, Sadahiko Miura, Naoki Kasai, Shoji Ikeda and Hideo Ohno
 
Jun 2011
Best Paper Award: International Symposium on Dry Process 2011, 日本応用物理学会
Winner: K. Kinoshita, T. Yamamoto, H. Honjo, N. Kasai, S. Ikeda, and H. Ohno
 

Published Papers

 
Masaaki Niwa, Akira Yasui, Eiji Ikenaga, Hiroaki Honjo, Shoji Ikeda, Tetsuya Nakamura, and Tetsuo Endoh
Journal of Applied Physics   125(203903)    May 2019   [Refereed]
H. Honjo, H. Sato, S. Ikeda, T. Endoh
IEEE. Transaction on Magnetics      Jan 2019   [Refereed]
A Fully Nonvolatile Microcontroller Unit with Embedded STT-MRAM and FPGA-Based Accelerator for Sensor-Node Applications in 40nm CMOS/MTJ-Hybrid Technology
M. Natsui, D. Suzuki, A. Tamakoshi, T. Watanabe, H. Honjo, H. Koike, T. Nasuno, Y. Ma, T. Tanigawa, Y. Noguchi, M. Yasuhira, H. Sato, S. Ikeda, H. Ohno, T. Endoh, and T. Hanyu
IEEE Journal of Solid State Circuits      2019   [Refereed]
H. Honjo, S. Ikeda, H. Sato, M. Yasuhira, and T. Endoh
Journal of Applied Physics   126 113902   Sep 2019   [Refereed]
S.Miura, H.Sato, S.Ikeda, K. Nishioka , H.Honjo and T.Endoh
IEEE. Transaction on Magnetics      2019   [Refereed]
Tetsuo Endoh, Hiroaki Honjo
Journal of Low Power Electronics and Applications   8(4)    Nov 2018   [Refereed]
Masaaki Niwa, Kosuke Kimura, Toshinari Watanabe,· Takanori Naijou, Hiroaki Honjo,· Shoji Ikeda,· Tetsuo Endoh
Applied Physics A   124(724)    Oct 2018   [Refereed]
Hideo Sato, Toshinari Watanabe, Hiroki Koike, Takashi Saito, Sadahiko Miura, Hiroaki Honjo, Hirofumi Inoue, Shoji Ikeda, Yasuo Noguchi, Takaho Tanigawa, Mitsuo Yasuhira, Hideo Ohno, Song Yun Kang, Takuya Kubo, Koichi Takatsuki, Koji Yamashita, Yasushi Yagi, Ryo Tamura, Takuro Nishimura, Koh Murata, Tetsuo Endoh
2018 IEEE International Memory Workshop (IMW)      May 2018   [Refereed]
Saito Takashi, Ito Kenchi, Honjo Hiroaki, Ikeda Shoji, Endoh Tetsuo
IEEE TRANSACTIONS ON MAGNETICS   54(4)    Apr 2018   [Refereed]
H. Honjo, S. Ikeda, H. Sato, K. Nishioka, T.Watanabe, S. Miura, T. Nasuno, Y. Noguchi,M. Yasuhira, T.Tanigawa, H. Koike, H. Inoue, M. Muraguchi, M.Niwa, H. Ohno, and T. Endoh
IEEE Transaction on Magnetics      May 2017   [Refereed]

Misc

 
小池 洋紀, 三浦 貞彦, 本庄 弘明, 渡辺 俊成, 佐藤 英夫, 佐藤 創志, 那須野 孝, 野口 靖夫, 安平 光雄, 谷川 高穂, 村口 正和, 丹羽 正昭, 伊藤 顕知, 池田 正二, 大野 英男, 遠藤 哲郎
電子情報通信学会技術研究報告 = IEICE technical report : 信学技報   116(3) 51-56   Apr 2016
小池洋紀, 三浦貞彦, 本庄弘明, 渡辺俊成, 小池洋紀, 三浦貞彦, 本庄弘明, 渡辺俊成, 佐藤英夫, 佐藤創志, 那須野孝, 野口靖夫, 安平光雄, 谷川高穂, 村口正和, 丹羽正昭, 佐藤創志, 那須野孝, 野口靖夫, 安平光雄, 谷川高穂, 村口正和, 丹羽正昭, 伊藤顕知, 池田正二, 池田正二, 大野英男, 遠藤哲郎, 遠藤哲郎
電子情報通信学会技術研究報告   116(3(ICD2016 1-15)) 51‐56   Apr 2016
SAKIMURA Noboru, TSUJI Yukihide, NEBASHI Ryusuke, HONJO Hiroaki, MORIOKA Ayuka, ISHIHARA Kunihiko, KINOSHITA Keizo, FUKAMI Shunsuke, MIURA Sadahiko, KASAI Naoki, ENDOH Tetsuo, OHNO Hideo, HANYU Takahiro, SUGIBAYASHI Tadahiko
Technical report of IEICE. SDM   114(174) 39-44   Aug 2014
A 90-nm fully nonvolatile microcontroller employing three-terminal eMRAM cell into both nonvolatile logic and memory circuits was demonstrated. It achieved 20-MHz operating frequency, zero standby leakage by power gating technique and 120-ns wakeu...
SAKIMURA Noboru, TSUJI Yukihide, NEBASHI Ryusuke, HONJO Hiroaki, MORIOKA Ayuka, ISHIHARA Kunihiko, KINOSHITA Keizo, FUKAMI Shunsuke, MIURA Sadahiko, KASAI Naoki, ENDOH Tetsuo, OHNO Hideo, HANYU Takahiro, SUGIBAYASHI Tadahiko
Technical report of IEICE. ICD   114(175) 39-44   Aug 2014
A 90-nm fully nonvolatile microcontroller employing three-terminal eMRAM cell into both nonvolatile logic and memory circuits was demonstrated. It achieved 20-MHz operating frequency, zero standby leakage by power gating technique and 120-ns wakeu...
崎村昇, 辻幸秀, 根橋竜介, 本庄弘明, 森岡あゆ香, 石原邦彦, 木下啓藏, 深見俊輔, 三浦貞彦, 笠井直記, 遠藤哲郎, 大野英男, 羽生貴弘, 杉林直彦
電子情報通信学会技術研究報告   114(175(ICD2014 31-52)) 39-44   Jul 2014
OHSAWA Takashi, KOIKE Hiroki, MIURA Sadahiko, KINOSHITA Keizo, HONJO Hiroaki, IKEDA Shoji, HANYU Takahiro, OHNO Hideo, ENDOH Tetsuo
Technical report of IEICE. ICD   114(13) 33-38   Apr 2014
This paper reports on a 1Mb STT-MRAM achieving 2.1nsec write cycle with background write (BGW) scheme applied to a 6T2MTJ memory cell in which a pair of MTJs are switched by using the data updated in a CMOS latch in a fast write cycle. By this sch...
KOIKE Hiroki, SAKIMURA Noboru, NEBASHI Ryusuke, TSUJI Yukihide, MORIOKA Ayuka, MIURA Sadahiko, HONJO Hiroaki, SUGIBAYASHI Tadahiko, OHSAWA Takashi, IKEDA Shoji, HANYU Takahiro, OHNO Hideo, ENDOH Tetsuo
Technical report of IEICE. ICD   114(13) 85-90   Apr 2014
We propose a novel power-gated microprocessor unit (MPU) using a nonvolatile flip-flop (NV-F/F) with magnetic tunnel junction (MTJ). By using the NV-F/F to store the MPU's internal state, this MPU realizes power-gating operation with a small 3-μse...
小池洋紀, 崎村昇, 根橋竜介, 辻幸秀, 森岡あゆ香, 三浦貞彦, 本庄弘明, 杉林直彦, 大澤隆, 池田正二, 羽生貴弘, 大野英男, 遠藤哲郎
電子情報通信学会技術研究報告   114(13(ICD2014 1-18)) 85-90   Apr 2014
根橋竜介, 崎村昇, 辻幸秀, 深見俊輔, 本庄弘明, 齊藤信作, 三浦貞彦, 石綿延行, 木下啓蔵, 羽生貴弘, 遠藤哲郎, 笠井直記, 大野英男, 杉林直彦
電子情報通信学会技術研究報告   112(15(ICD2012 1-18)) 49-54   Apr 2012
A 5-ns search operation of a non-volatile content addressable memory was demonstrated. The CAM macro, with a capacity of 16 kb, was fabricated using 90-nm CMOS and domain wall (DW) motion processes. The operating speed was comparable to that of SR...

Conference Activities & Talks

 
An Ultra-Low-Power STT-MRAM-Based Multi-Core Associative Coprocessor with Inter-Core Pipeline Scheme for Large-Scale Full-Adaptive Nearest Pattern Search
Y. Ma, S. Miura, H. Honjo, S. Ikeda and T. Endoh
2019 International Conference on Solid State Devices and Materials   4 Sep 2019   
Novel Quad Interface MTJ Technology and Its First Demonstration with High Thermal Stability and Switching Efficiency for STT-MRAM Beyond 2Xnm
K. Nishioka, H. Honjo, S. Ikeda, T. Watanabe, S. Miura, H. Inoue, T. Tanigawa, Y. Noguchi, M. Yasuhira, H. Sato and T. Endoh
2019 Symposia on VLSI Technology and Circuits   12 Jun 2019   
A demonstration of high-performance STT-MRAM by development of unit process and integration process
H. Sato, H. Honjo, T. Watanabe, M. Niwa, H. Koike, S. Miura, T. Saito, H. Inoue, T. Nasuno, T. Tanigawa, Y. Noguchi, T. Yoshiduka, M. Yasuhira, S. Ikeda, S.- Y. Kang, T. Kubo, K. Yamashita, R. Tamura, T. Nishimura, K. Murata, and T. Endoh
ICD   23 Apr 2019   
An FPGA-Accelerated Fully Nonvolatile Microcontroller Unit for Sensor- Node Applications in 40nm CMOS/MTJ-Hybrid Technology Achieving 47.14μW Operation at 200MHz
M. Natsui, D. Suzuki, A. Tamakoshi, T. Watanabe, H. Honjo, H. Koike,T. Nasuno, Y. Ma , T. Tanigawa, Y. Noguchi, M. Yasuhira, H. Sato, S. Ikeda,H. Ohno, T. Endoh, T. Hanyu
International Solid-State Circuits Conference   19 Feb 2019   
Insertion Layer Thickness Dependence of Magnetic and Electrical Properties for Double CoFeB/MgO Interface Magnetic Tunnel Junctions
S. Miura, T. V. A. Nguyen, Y. Endo , H. Sato, S. Ikeda , K. Nishioka , H. Honjo , and T. Endoh
17 Jan 2019   
Critical role of sputtering condition for reference layer on magnetic and transport properties of perpendicular-anisotropy magnetic tunnel junction.
H. Honjo, H. Sato, S. Ikeda, T. Endoh
15 Jan 2019   
14ns write speed 128Mb density Embedded STT-MRAM with endurance>10^10 and 10yrs retention @85°C using novel low damage MTJ integration process
HONJO Hiroaki
International Electron Devise Meeting   5 Dec 2018   
High-performance (Co)FeB/MgO-based magnetic tunnel junctions with perpendicular easy axis down to single-digit nanometer scale
Spintronics Workshop on LSI   Jun 2018   
1T-1MTJ type embedded STT-MRAM with advanced low-damage and short-failure-free RIE technology down to 32 nmΦ MTJ patterning
H. Sato, T. Watanabe, H. Honjo, et. al.
International Memory Workshop   15 May 2018   
Performance advances in double CoFeB/MgO interface p-MTJs by designing cap stack structure
HONJO Hiroaki
Kick-off Symposium for World Leading Research Centers -Materials Science and Spintronics-   20 Feb 2018   

Social Contribution

 
[Others]  American institute of physics  Scilight  17 Sep 2019
MRAMは本命不在、MTJ技術の裾野には広がり
[Others]  日経テクノロジーon line  23 Jun 2015
VLで本庄らが発表した内容が日経テクノロジーon lineに取り上げられた。