Jiro Ida

Profile Information

Affiliation: Kanazawa Institute of Technology College of Engineering Department of Electrical and Electronic Engineering, Kanazawa Institute of Technology

Degree: 博士（工学）

J-GLOBAL ID: 200901079216853664
researchmap Member ID: 6000020102

Research Interests

Research Areas

Manufacturing technology (mechanical, electrical/electronic, chemical engineering) / Electronic devices and equipment /

Research History

Jun, 2009

Department of Electrical and Electronic Engineering, College of Engineering, Kanazawa Institute of Technology
Apr, 2004 - Mar, 2009

沖電気工業半導体カンパニ研究部長
Mar, 2001 - Apr, 2004

沖電気工業半導体ビジネス部門担当部長
Nov, 1985 - Mar, 2001

沖電気工業半導体部門

Education

Papers

132

Steep Slope Device “N-type Gate-Controlled Carrier-Injection SOI-Transistor”: Suppression of Hysteresis by Ar-ion Implantation and Possibility of CMOS

Haruki Yonezaki, Takayuki Mori, Jiro Ida

2024 IEEE Silicon Nanoelectronics Workshop (SNW), 479 57-58, Jun 15, 2024
Control of Hysteresis and Latch-Up on Steep Switching “PN-Body Tied SOI-FET Diode” by Ar-Ion Implantation

Hiroyoshi Matsushita, Takayuki Mori, Jiro Ida

2024 International VLSI Symposium on Technology, Systems and Applications (VLSI TSA), Apr 22, 2024
New Steep Subthreshold Slope Device “Gate-Controlled Carrier-Injection SOI-Transistor”

Haruki Yonezaki, Takayuki Mori, Jiro Ida

2024 8th IEEE Electron Devices Technology &amp; Manufacturing Conference (EDTM), Mar 3, 2024
Leaky-integrate-and-fire operation with signal amplification using gate-controlled carrier-injection silicon-on-insulator transistor

Haruki Yonezaki, Takayuki Mori, Jiro Ida

Japanese Journal of Applied Physics, 63(2) 02SP83-02SP83, Feb 1, 2024
Neural Network Modeling of Steep Turn-on Diodes: Validation and Implementation in SPICE Simulations

Kengo Nakata, Takayuki Mori, Jiro Ida

2023 IEEE International Meeting for Future of Electron Devices, Kansai (IMFEDK), Nov 16, 2023
Integrate-and-Fire Operation with Signal Amplification by using “Dual-Gate PN-Body Tied SOI-FET”

Haruki Yonezaki, Takayuki Mori, Jiro Ida

Extended Abstracts of the 2023 International Conference on Solid State Devices and Materials, Sep 7, 2023
Steep Subthreshold Slope “Dual-Gate PN-Body Tied SOI-FET” -First Fabrication Results-

Haruki Yonezaki, Takayuki Mori, Jiro Ida

Solid-State Electronics, 108720-108720, Jul, 2023
Neuronal Function and Signal Amplification Device with Steep Switching “PN-Body Tied SOI-FET”

Takayuki Mori, Jiro Ida

2023 International VLSI Symposium on Technology, Systems and Applications (VLSI-TSA/VLSI-DAT), Apr 17, 2023
Variability Evaluation of MOS-gated PNPN Diode for Hardware Spiking Neural Network

Toshihiro Takada, Takayuki Mori, Jiro Ida

2023 35th International Conference on Microelectronic Test Structure (ICMTS), Mar 27, 2023
Sharp Turn-on Diode by Steep SS “PN-Body Tied SOI FET” for Ultra-low Power RF Energy Harvesting

Masayuki Ono, Jiro Ida, Takayuki Mori, Koichiro Ishibashi

2023 7th IEEE Electron Devices Technology & Manufacturing Conference (EDTM), Mar 7, 2023
Modeling of Super Steep Subthreshold Slope Device by using Neural Network

Kengo Nakata, Takayuki Mori, Jiro Ida

2022 IEEE International Meeting for Future of Electron Devices, Kansai (IMFEDK), Nov 28, 2022
Evaluation of Multi-Finger PN-Body Tied SOI-FET-Origin and Suppression of Stepped I_d–V_g Characteristics-

Takayuki Mori, Kengo Nakata, Jiro Ida

2022 International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA), Apr 18, 2022
Neuron Function with Single Device by using "PN-Body Tied SOI-FET"-Mimicking Leaky Integrate and Fire Characteristics-

Toru Sasaki, Takayuki Mori, Jiro Ida

2022 6th IEEE Electron Devices Technology & Manufacturing Conference (EDTM), Mar 6, 2022
RF Evaluation of Steep Subthreshold Slope “PN-Body Tied SOI-FET”

Mitsuhiro Yuizono, Jiro Ida, Takayuki Mori, Koichiro Ishibashi

2021 IEEE International Meeting for Future Electron Devices, Kansai (IMFEDK), Nov 17, 2021
Developing Ultralow Trun-on Voltage Diode by Steep Slope "PN-Body Tied SOI-FET"

Masayuki Ono, Jiro Ida, Takayuki Mori, Koichiro Ishibashi

2021 IEEE International Meeting for Future Electron Devices, Kansai (IMFEDK), Nov 17, 2021
Investigation of capacitor-less integrate and fire neuron by using dual-gate a PN-body tied silicon on insulator field-effect transistor

Takayuki Mori, Jiro Ida

Japanese Journal of Applied Physics, 60(SB) SBBA04-SBBA04, May 1, 2021 Peer-reviewed
Transfer Characteristics of CMOS Inverter using "Steep SS PN-Body Tied SOI-FET"

Shota Ishiguro, Jiro Ida, Takayuki Mori, Koichiro Ishibashi

2021 International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA), Apr 19, 2021
Analysis of Drain Current Enhancement in "PN-Body Tied SOI-FET" -Bulk vs Surface Conduction Mode and Low Vds Saturation Effect-

Hiroki Itoh, Jiro Ida, Takayuki Mori, Koichiro Ishibashi

2021 International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA), Apr 19, 2021
Neuron Circuit Using Dual Gate PN Body-Tied SOI-FET

Mori Takayuki, Ida Jiro

JSAP Annual Meetings Extended Abstracts, 2021.1 2346-2346, Feb 26, 2021
Transient Characteristics on Super-Steep Subthreshold Slope “PN-Body Tied SOI-FET” — Simulation and Pulse Measurement —

Takayuki MORI, Jiro IDA, Hiroki ENDO

IEICE Transactions on Electronics, E103.C(10) 533-542, Oct 1, 2020 Peer-reviewed

Misc.

極低電圧動作を狙ったSteep SS "Dual-Gate型PN-Body Tied SOI-FET"試作結果—Evaluation of Steep Subthreshold Slope Device "Dual-Gate type PN-Body Tied SOI-FET" for Ultra Low Voltage Operation—情報センシング

米崎晴貴, 井田次郎, 森貴之, 石橋考一郎

映像情報メディア学会技術報告 = ITE technical report, 46(23) 19-22, Aug, 2022
招待講演極低電力LSIに向けたSteep Slope "PN-Body Tied SOI-FET"の研究状況—Research Status of Steep Slope "PN-Body Tied SOI-FET" for Ultra low Power LSI Applications—情報センシング

井田次郎, 森貴之

映像情報メディア学会技術報告 = ITE technical report, 46(23) 15-18, Aug, 2022
急峻なSSを持つ"PN-Body Tied SOI-FET"のCMOSインバータ伝達特性

イシグロショウタ, イダジロウ, モリタカユキ, イシバシコウイチロウ

44(17) 57-60, Aug, 2020
RFエネルギーハーベスティング用のSOI-MOSダイオードと高インピーダンスアンテナを用いたレクテナの検討と試作

河野渓介, 井田次郎, 森貴之, 野口啓介, 伊東健治

電気・情報関係学会北陸支部連合大会(CD-ROM), 2020, 2020
Steep Slope PN-Body Tied SOI-FETの研究 -65 nm Thin Box SOIと200 nm SOIの比較-

井田次郎

第２回量子線イメージング研究会, 9/24-25 2019 イーグレ姫路著者：森貴之，井田次郎, Sep, 2019
Super-Steep Subthreshold Slope PN-Body Tied SOI-FET -センサ回路の革新に向けて-

井田次郎

第1回量子線イメージング研究会, p-37, 2018年9月25-26日、京都大学著者：森貴之, 井田次郎, Sep, 2019
急峻なSSを持つ"PN Body-Tied SOI-FET"におけるBOX中の正電荷と基板バイアスの影響

ヤブキワタル, イダジロウ, モリタカユキ, イシバシコウイチロウ, アライヤスオ

119(162) 89-93, Aug, 2019
極急峻SSを持つ"PN-Body Tied SOI-FET"を使った極低電力レクテナ

ヤマダタクヤ, イダジロウ, モリタカユキ, ヤスマルノブヒコ, イトウケンジ, イシバシコウイチロウ

119(161) 95-98, Aug, 2019
Fabrication of Rectenna with 10 kohm Antenna and SOI-MOSFET Diode for RF Energy Harvesting

IDA Jiro

TJMW (Thailand-Japan Microwave)2019,YE-25 ,pp1-2, 26-28/6/2019 Authors: R.YANAGI, Y. TSUCHIYA , J. IDA, T. MORI , T.YAMADA, K. NOGUCHI and K. ITOH, Jun, 2019
HyENEXSSを用いたSuper Steep SS PN-Body Tied SOI FETの過渡解析

井田次郎

TCADアカデミック委員会研究会 2019年6月21日、慶応義塾大学著者：森、井田, Jun, 2019
依頼講演）金沢工大でのRF-EHプロジェクト紹介とEH用新構造Diode技術

井田次郎

Wipotコンソーシアム講演会、3月5日、2019, 金沢工業大学著者：井田次郎, Mar, 2019 Invited
スーパースティープトランジスタ整流器を用いたAMラジオ波からの発電

井田次郎

NanoTech 2019, 1月30日～2月1日 2019, 東京ビックサイト著者：石橋孝一郎、井田次郎, Jan, 2019
招待講演急峻なSSを持つPN-Body Tied SOI-FETを用いたMOS Diode接続での特性および微小電圧整流実験

モモセシュン, イダジロウ, ヤマダタクヤ, モリタカユキ, イトウケンジ, イシバシコウイチロウ, アライヤスオ

118(291) 59-64, Nov, 2018
スーパースティープトランジスタ整流器を用いたAMラジオ波からの発電

井田次郎

JST-CREST・さきがけ複合領域公開シンポジウム、2018,11,8 早稲田大学著者：石橋孝一郎、佐藤康夫、井田次郎、伊東健治, Nov, 2018
急峻なSSを持つ"PN-Body Tied SOI-FET"を使った極低電圧整流実験—Experiment of Ultralow Voltage Rectification by Super Steep SS "PN-Body Tied SOI-FET"—集積回路

百瀬駿, 井田次郎, 山田拓弥, 森貴之, 伊東健治, 石橋孝一郎, 新井康夫

電子情報通信学会技術研究報告 = IEICE technical report : 信学技報, 118(173) 31-34, Aug, 2018
The 500 MHz Band High-Sensitivity Rectenna with the High-Impedance Folded Dipole Antenna with slits

IDA Jiro

TJMW (Thailand-Japan Microwave)2018,YE- , pp1-3, 26-27/6/2018 Authors:Hiroki KISHIMOTO, Kenji ITOH, Keisuke NOGUCHI, Jiro IDA, Jun, 2018
Rectification of Small Voltage Signal by Super Steep Subthreshold Slope PN-Body Tied SOI FET for RF Energy Harvesting

IDA Jiro

TJMW (Thailand-Japan Microwave)2018,YE-4 ,pp1-2, 26-27/6/2018, Jun, 2018
High Efficiency Rectenna Design with High Impedance Antenna and SOI-MOSFET Connected Diode for RF Energy Harvesting

IDA Jiro

TJMW (Thailand-Japan Microwave)2018,YE-10,pp1-2, 26-27/6/2018 Authors: Y. TSUCHIYA , J. IDA, T. MORI , T.YAMADA, S. MOMOSE, K. NOGUCHI and K. ITOH, Jun, 2018
誘導性高インピーダンス折り返しダイポールアンテナを用いる広帯域レクテナ—The wideband rectenna with the inductive folded dipole antenna—集積回路

岸本大輝, 伊東健治, 野口啓介, 井田次郎

電子情報通信学会技術研究報告 = IEICE technical report : 信学技報, 117(463) 109-114, Mar, 2018
(Invited) Super Steep Subthreshold Slope PN-Body Tied SOI FET for Ultra Low Power IoT applications and_RF Energy Harvesting

井田次郎

XIX International Workshop on The Physics of Semiconductor Devices(IWPSD), VT06, 13/12/2017, New Delhi India 著者：Jiro Ida, Dec, 2017 Invited

Professional Memberships

Research Projects

Research on SOI 3D pixel process

Grants-in-Aid for Scientific Research, Grant-in-Aid for Scientific Research on Innovative Areas (Research in a proposed research area), Japan Society for the Promotion of Science, Jun, 2013 - Mar, 2018

Arai Yasuo
(IS展開) アンテナ・回路・デバイス協調設計による極低入力での高効率環境RFエネルギー・ハーベスターの試作検証 STARC FS 2015年度研究成果概要, pp1-2, 3月2016年著者：井田次郎、野口啓介, 伊東健治

STARC FS, STARC, Mar, 2016

井田次郎, 井田次郎
IS展開) アンテナ・回路・デバイス協調設計による極低入力での高効率環境RFエネルギー・ハーベスターの試作検証, STARC FS 2015年度成果報告会,７月16日、2015年著者：井田次郎、野口啓介, 伊東健治

STARC FS, STARC, Jul, 2015

井田次郎, 井田次郎
(IS展開) アンテナ・回路・デバイス協調設計による極低入力での高効率環境RFエネルギー・ハーベスターの試作検証 STARC FS 2014年度研究成果概要, pp1-230,4月2015年著者：井田次郎、野口啓介, 伊東健治

STARC FS, STARC, Apr, 2015

井田次郎, 井田次郎
(IS展開) アンテナ・回路・デバイス協調設計による極低入力での高効率環境RFエネルギー・ハーベスターの試作検証 STARC FS 2014年度研究成果概要, pp1-2 著者：井田次郎、野口啓介, 伊東健治

STARC FS, STRAC, Mar, 2015

井田次郎, 井田次郎

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