福田浩一 (Fukuda Koichi) - マイポータル - researchmap

基本情報

J-GLOBAL ID: 201801016693890618
researchmap会員ID: B000302153

論文

81

Simulation study of short-channel effects of tunnel field-effect transistors

Koichi Fukuda, Hidehiro Asai, Junichi Hattori, Takahiro Mori, Yukinori Morita, Wataru Mizubayashi, Meishoku Masahara, Shinji Migita, Hiroyuki Ota, Kazuhiro Endo …

Japanese Journal of Applied Physics 57(4) 2018年4月1日査読有り
Fringing field effects in negative capacitance field-effect transistors with a ferroelectric gate insulator

Junichi Hattori, Koichi Fukuda, Tsutomu Ikegami, Hiroyuki Ota, Shinji Migita, Hidehiro Asai, Akira Toriumi

Japanese Journal of Applied Physics 57(4) 2018年4月1日査読有り
Design of steep-slope negative-capacitance FinFETs for dense integration: Importance of appropriate ferroelectric capacitance and short-channel effects

Hiroyuki Ota, Junichi Hattori, Hidehiro Asai, Tsutomu Ikegami, Koichi Fukuda, Shinji Migita, Akira Toriumi

Japanese Journal of Applied Physics 57(4) 2018年4月1日査読有り
A transient simulation approach to obtaining capacitance-voltage characteristics of GaN MOS capacitors with deep-level traps

Koichi Fukuda, Hidehiro Asai, Junichi Hattori, Mitsuaki Shimizu, Tamotsu Hashizume

Japanese Journal of Applied Physics 57(4) 2018年4月1日査読有り
Perspective of negative capacitance FinFETs investigated by transient TCAD simulation

Hiroyuki Ota, Koichi Fukuda, Tsutomu Ikegami, Junichi Hattori, Hidehiro Asai, Shinji Migita, Akira Toriumi

Technical Digest - International Electron Devices Meeting, IEDM 15.2.1-15.2.4 2018年1月23日査読有り
Simulation of GaN MOS capacitance with frequency dispersion and hysteresis

Koichi Fukuda, Junichi Hattori, Hidehiro Asai, Mitsuaki Shimizu, Tamotsu Hashizume

International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2017- 233-236 2017年10月25日査読有り
Tunnel FinFET CMOS inverter with very low short-circuit current for ultralow-power Internet of Things application

Yukinori Morita, Koichi Fukuda, Yongxun Liu, Takahiro Mori, Wataru Mizubayashi, Shin-ichi O'uchi, Hiroshi Fuketa, Shintaro Otsuka, Shinji Migita, Meishoku Masahara …

JAPANESE JOURNAL OF APPLIED PHYSICS 56(4) 2017年4月査読有り
Suppression of tunneling rate fluctuations in tunnel field-effect transistors by enhancing tunneling probability

Takahiro Mori, Shinji Migita, Koichi Fukuda, Hidehiro Asai, Yukinori Morita, Wataru Mizubayashi, Yongxun Liu, Shin-ichi O'uchi, Hiroshi Fuketa, Shintaro Otsuka …

JAPANESE JOURNAL OF APPLIED PHYSICS 56(4) 2017年4月査読有り
Structural advantages of silicon-on-insulator FETs over FinFETs in steep subthreshold-swing operation in ferroelectric-gate FETs

Hiroyuki Ota, Shinji Migita, Junichi Hattori, Koichi Fukuda, Akira Toriumi

JAPANESE JOURNAL OF APPLIED PHYSICS 56(4) 2017年4月査読有り
On the drain bias dependence of long-channel silicon-on-insulator-based tunnel field-effect transistors

Koichi Fukuda, Takahiro Mori, Hidehiro Asai, Junichi Hattori, Wataru Mizubayashi, Yukinori Morita, Hiroshi Fuketa, Shinji Migita, Hiroyuki Ota, Meishoku Masahara …

JAPANESE JOURNAL OF APPLIED PHYSICS 56(4) 2017年4月査読有り
Interlayer coupling effect on the performance of monolithic three-dimensional inverters and its dependence on the interlayer dielectric thickness

Junichi Hattori, Koichi Fukuda, Toshifumi Irisawa, Hiroyuki Ota, Tatsuro Maeda

JAPANESE JOURNAL OF APPLIED PHYSICS 56(4) 2017年4月査読有り
Compact model of ferroelectric-gate field-effect transistor for circuit simulation based on multidomain Landau-Kalathnikov theory

Hidehiro Asai, Koichi Fukuda, Junichi Hattori, Hanpei Koike, Noriyuki Miyata, Mitsue Takahashi, Shigeki Sakai

JAPANESE JOURNAL OF APPLIED PHYSICS 56(4) 2017年4月査読有り
Bias temperature instability in tunnel field-effect transistors

Wataru Mizubayashi, Takahiro Mori, Koichi Fukuda, Yuki Ishikawa, Yukinori Morita, Shinji Migita, Hiroyuki Ota, Yongxun Liu, Shinichi O'uchi, Junichi Tsukada …

JAPANESE JOURNAL OF APPLIED PHYSICS 56(4) 2017年4月査読有り
Material and device engineering in fully depleted silicon-on-insulator transistors to realize a steep subthreshold swing using negative capacitance

Hiroyuki Ota, Shinji Migita, Junichi Hattori, Koichi Fukuda, Akira Toriumi

JAPANESE JOURNAL OF APPLIED PHYSICS 55(8) 2016年8月査読有り
Scaling limit for InGaAs/GaAsSb heterojunction double-gate tunnel FETs from the viewpoint of direct band-to-band tunneling from source to drain induced off-characteristics deterioration

Wenbo Lin, Shinjiro Iwata, Koichi Fukuda, Yasuyuki Miyamoto

JAPANESE JOURNAL OF APPLIED PHYSICS 55(7) 2016年7月査読有り
Steep subthreshold swing and energy efficiency in MOSFFETs utilizing nonlinear gate dielectric insulators

Hiroyuki Ota, Shinji Migita, Koichi Fukuda, Akira Toriumi

JAPANESE JOURNAL OF APPLIED PHYSICS 55(4) 2016年4月査読有り
Introduction of SiGe/Si heterojunction into novel multilayer tunnel FinFET

Yukinori Morita, Koichi Fukuda, Takahiro Mori, Wataru Mizubayashi, Shinji Migita, Kazuhiko Endo, Shin-ichi O'uchi, Yongxun Liu, Meishoku Masahara, Takashi Matsukawa …

JAPANESE JOURNAL OF APPLIED PHYSICS 55(4) 2016年4月査読有り
Closed-form analytical model of static noise margin for ultra-low voltage eight-transistor tunnel FET static random access memory

Hiroshi Fuketa, Shin-ichi O'uchi, Koichi Fukuda, Takahiro Mori, Yukinori Morita, Meishoku Masahara, Takashi Matsukawa

JAPANESE JOURNAL OF APPLIED PHYSICS 55(4) 2016年4月査読有り
Fully Coupled 3-D Device Simulation of Negative Capacitance FinFETs for Sub 10 nm Integration

Hiroyuki Ota, Tsutomu Ikegami, Junichi Hattori, Koichi Fukuda, Shinji Migita, Akira Toriumi

2016 IEEE INTERNATIONAL ELECTRON DEVICES MEETING (IEDM) 2016年査読有り
Design and Simulation of Steep-Slope Silicon-On-Insulator FETs using Negative Capacitance: Impact of Buried Oxide Thickness and Remnant Polarization

Hiroyuki Ota, Shinji Migita, Junichi Hattori, Koichi Fukuda, Akira Toriumi

2016 IEEE 16TH INTERNATIONAL CONFERENCE ON NANOTECHNOLOGY (IEEE-NANO) 770-772 2016年査読有り

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