Kota Shiba - My portal

Profile Information

Affiliation: Senior Engineer, Memory Division, TSMC

Degree: Ph.D. degree(Mar, 2023, The University of Tokyo)
M.S. degree(Mar, 2020, Keio University)
B.S. degree(Mar, 2018, Keio University)

Contact information: kshibaieee.org
ORCID iD: https://orcid.org/0000-0001-8804-7687
J-GLOBAL ID: 202101001816924260
researchmap Member ID: R000025830

External link: http://kotashiba.com

Research Interests

Research Areas

Research History

Apr, 2023 - Present

Senior Engineer, TSMC
Oct, 2021 - Mar, 2023

Researcher, ACT-X, Japan Science and Technology Agency
Apr, 2021 - Mar, 2023

Research Fellow (DC2), Japan Society for the Promotion of Science
Oct, 2020 - Mar, 2021

Doctoral Student Special Incentives Program Researcher (SEUT-RA), The University of Tokyo

Education

Apr, 2020 - Mar, 2023

Department of Electrical Engineering and Information Systems, The Graduate School of Engineering, The University of Tokyo
Apr, 2018 - Mar, 2020

Department of Integrated Design Engineering, Graduate School of Science and Technology, Keio University
Apr, 2014 - Mar, 2018

Department of Electronics and Electrical Engineering, Faculty of Science and Technology, Keio University

Awards

Feb, 2023

IEEE Solid-State Circuits Society (SSCS), IEEE SSCS Pre-Doctoral Achievement Award

Kota Shiba
2021

Highlights of 2020, 2.5D integration using inductive-coupling TSV-less miniature interposer achieving 317 Gb/s/mm², 1.2 pJ/b data-transfer, The Japan Society of Applied Physics

K. Shiba, C. Cheng, M. Hamada, T. Kuroda
Nov, 2020

Best Student Paper Award, A 50 Mbps/pin 12-input/output 40 nsec Latency Wireless Connector Using a Transmission Line Coupler with Compact SERDES IC in 180 nm CMOS, IEEE International Conference on Electronics Circuits and Systems (ICECS)

K. Ando, K. Shiba, K. Akatsuka, C. Cheng, T. Arakawa, M. Hamada, T. Kuroda
Apr, 2020

Spotlights, 2.5D integration using inductive-coupling TSV-less miniature interposer achieving 317 Gb/s/mm², 1.2 pJ/b data-transfer, The Japan Society of Applied Physics

K. Shiba, C. Cheng, M. Hamada, T. Kuroda
Mar, 2018

IEEJ Tokyo Branch Student Encouragement Award, The Institute of Electrical Engineers of Japan

Major Papers

Polyomino: A 3D-SRAM-Centric Accelerator for Randomly Pruned Matrix Multiplication With Simple Reordering Algorithm and Efficient Compression Format in 180-nm CMOS

Kota Shiba, Mitsuji Okada, Atsutake Kosuge, Mototsugu Hamada, Tadahiro Kuroda

IEEE Transactions on Circuits and Systems I: Regular Papers, 70(9) 1-11, May, 2023 Peer-reviewedLead author
A 12.8-Gb/s 0.5-pJ/b Encoding-less Inductive Coupling Interface Achieving 111-GB/s/W 3D-Stacked SRAM in 7-nm FinFET

Kota Shiba, Mitsuji Okada, Atsutake Kosuge, Mototsugu Hamada, Tadahiro Kuroda

IEEE Solid-State Circuits Letters, 6 1-1, Mar, 2023 Peer-reviewedLead author
A 7-nm FinFET 1.2-TB/s/mm$^{2}$ 3D-Stacked SRAM Module With 0.7-pJ/b Inductive Coupling Interface Using Over-SRAM Coil and Manchester-Encoded Synchronous Transceiver

Kota Shiba, Mitsuji Okada, Atsutake Kosuge, Mototsugu Hamada, Tadahiro Kuroda

IEEE Journal of Solid-State Circuits, 1-12, 2023 Peer-reviewedLead author
A 96-MB 3D-Stacked SRAM Using Inductive Coupling With 0.4-V Transmitter, Termination Scheme and 12:1 SerDes in 40-nm CMOS

Kota Shiba, Tatsuo Omori, Kodai Ueyoshi, Shinya Takamaeda-Yamazaki, Masato Motomura, Mototsugu Hamada, Tadahiro Kuroda

IEEE Transactions on Circuits and Systems I: Regular Papers, 68(2) 692-703, Feb, 2021 Peer-reviewedLead author
Area-Efficient Multihop Inductive Coupling Interface for 3D-Stacked Memory With 0.23-V Transmitter and Sub-10-μm Coil Design

Kota Shiba, Tatsuo Omori, Masahiro Usui, Mototsugu Hamada, Tadahiro Kuroda

IEEE Solid-State Circuits Letters, 3 370-373, Sep, 2020 Peer-reviewedLead author

Presentations

A 5-GHz 0.15-mm² Collision Avoidable RFID Employing Complementary Pass-Transistor Adiabatic Logic with an Inductively Connected External Antenna (invited)

S. Shibata, R. Miura, Y. Sawabe, K. Shiba, A. Kosuge, M. Hamada, T. Kuroda

IEEE European Solid-State Circuits Conference (ESSCIRC), Sep 20, 2022 Invited
[招待講演] 三次元積層SRAMと近接場無線接続技術

柴康太, 小菅敦丈, 濱田基嗣, 黒田忠広

電子情報通信学会(IEICE) 集積回路研究会(ICD) メモリ技術と集積回路技術一般, Apr 11, 2022 Invited

Professional Memberships

Jan, 2022 - Present

IEEE Circuits and Systems Society (CASS)
Jan, 2021 - Present

IEEE Solid-State Circuits Society (SSCS)
Jan, 2020 - Present

IEEE

Research Projects

Efficient Architecture of 3D-Stacked AI Chips

ACT-X, Japan Science and Technology Agency (JST), Oct, 2021 - Mar, 2024
TSV-less 3D-Stacked SRAM

Grants-in-Aid for Scientific Research Grant-in-Aid for JSPS Fellows, Grant-in-Aid for JSPS Fellows, Japan Society for the Promotion of Science, Apr, 2021 - Mar, 2023

Media Coverage

半導体復活のチャンスをオープンとクローズの両戦略で生かす。

テレスコープマガジン, May 7, 2021 Internet