柴康太 (Kota Shiba) - 論文

Crosstalk Analysis and Countermeasures of High-Bandwidth 3D-Stacked Memory Using Multi-Hop Inductive Coupling Interface

Kota Shiba, Atsutake Kosuge, Mototsugu Hamada, Tadahiro Kuroda

IEICE Transactions on Electronics E106-C(7) 391-394 2023年7月査読有り筆頭著者

A 183.4nJ/inference 152.8μW Single-Chip Fully Synthesizable Wired-Logic DNN Processor for Always-On 35 Voice Commands Recognition Application

Atsutake Kosuge, Rei Sumikawa, Yao-Chung Hsu, Kota Shiba, Mototsugu Hamada, Tadahiro Kuroda

2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) 1-2 2023年6月11日

Polyomino: A 3D-SRAM-Centric Accelerator for Randomly Pruned Matrix Multiplication With Simple Reordering Algorithm and Efficient Compression Format in 180-nm CMOS

Kota Shiba, Mitsuji Okada, Atsutake Kosuge, Mototsugu Hamada, Tadahiro Kuroda

IEEE Transactions on Circuits and Systems I: Regular Papers 70(9) 1-11 2023年5月査読有り筆頭著者

A 12.8-Gb/s 0.5-pJ/b Encoding-less Inductive Coupling Interface Achieving 111-GB/s/W 3D-Stacked SRAM in 7-nm FinFET

Kota Shiba, Mitsuji Okada, Atsutake Kosuge, Mototsugu Hamada, Tadahiro Kuroda

IEEE Solid-State Circuits Letters 6 1-1 2023年3月査読有り筆頭著者

A 1.2nJ/Classification Fully Synthesized All-Digital Asynchronous Wired-Logic Processor Using Quantized Non-Linear Function Blocks in 0.18μm CMOS

Rei Sumikawa, Kota Shiba, Atsutake Kosuge, Mototsugu Hamada, Tadahiro Kuroda

Proceedings of the 28th Asia and South Pacific Design Automation Conference 2023年1月16日

A 7-nm FinFET 1.2-TB/s/mm$^{2}$ 3D-Stacked SRAM Module With 0.7-pJ/b Inductive Coupling Interface Using Over-SRAM Coil and Manchester-Encoded Synchronous Transceiver

Kota Shiba, Mitsuji Okada, Atsutake Kosuge, Mototsugu Hamada, Tadahiro Kuroda

IEEE Journal of Solid-State Circuits 1-12 2023年査読有り筆頭著者

1.2-nJ/classification 2.4-mm² asynchronous wired-logic DNN processor using synthesized nonlinear function blocks in 0.18-µm CMOS

Rei Sumikawa, Kota Shiba, Atsutake Kosuge, Mototsugu Hamada, Tadahiro Kuroda

Japanese Journal of Applied Physics 62(SC) SC1019-SC1019 2022年12月16日

A 12.8-Gbps 0.5-pJ/b Encoding-less Inductive Coupling Interface Using Clocked Hysteresis Comparator for 3D-stacked SRAM in 7-nm FinFET

Kota Shiba, Mitsuji Okada, Atsutake Kosuge, Mototsugu Hamada, Tadahiro Kuroda

2022 IEEE Asian Solid-State Circuits Conference (A-SSCC) 1-3 2022年11月6日査読有り筆頭著者

A Low-power RFID with 100kbps Data Rate Employing High-speed Power Clock Generator for Complementary Pass-transistor Adiabatic Logic

Saito Shibata, Yoshiki Sawabe, Kota Shiba, Atsutake Kosuge, Mototsugu Hamada, Tadahiro Kuroda

2022 29th IEEE International Conference on Electronics, Circuits and Systems (ICECS) 1-4 2022年10月24日査読有り

A 0.9nJ/Classification 2.4mm2 Neuron Cell Array Using Logically Compressed Non-Linear Function Blocks in 0.18μm CMOS

R. Sumikawa, K. Shiba, A. Kosuge, M. Hamada, T. Kuroda

JSAP International Conference on Solid State Devices and Materials (SSDM) 1-2 2022年9月査読有り

3D-Stacked SRAM Using Near-Field Wireless Communication

Kota Shiba, Atsutake Kosuge, Mototsugu Hamada, Tadahiro Kuroda

Journal of The Japan Institute of Electronics Packaging 25(6) 549-555 2022年9月1日査読有り招待有り筆頭著者

A 13.7μJ/prediction 88% Accuracy CIFAR-10 Single-Chip Wired-logic Processor in 16-nm FPGA using Non-Linear Neural Network

Yao-Chung Hsu, Atsutake Kosuge, Rei Sumikawa, Kota Shiba, Mototsugu Hamada, Tadahiro Kuroda

2022 IEEE Hot Chips 34 Symposium (HCS) 1-14 2022年8月21日査読有り

A 7-nm FinFET 1.2-TB/s/mm² 3D-Stacked SRAM with an Inductive Coupling Interface Using Over-SRAM Coils and Manchester-Encoded Synchronous Transceivers

Kota Shiba, Mitsuji Okada, Atsutake Kosuge, Mototsugu Hamada, Tadahiro Kuroda

2022 IEEE Hot Chips 34 Symposium (HCS) 58(7) 1-14 2022年8月21日査読有り筆頭著者

Polyomino: A 3D-SRAM-Centric Architecture for Randomly Pruned Matrix Multiplication with Simple Rearrangement Algorithm and x0.37 Compression Format

Kota Shiba, Mitsuji Okada, Atsutake Kosuge, Mototsugu Hamada, Tadahiro Kuroda

2022 20th IEEE Interregional NEWCAS Conference (NEWCAS) 1-5 2022年6月19日査読有り筆頭著者

A bonding-less 5-GHz RFID module using inductive coupling between IC and antenna

R. Miura, S. Shibata, M. Usui, K. Shiba, A. Kosuge, M. Hamada, T. Kuroda

Japanese Journal of Applied Physics 2022年5月査読有り

A 96-MB 3D-Stacked SRAM Using Inductive Coupling with 0.4-V Transmitter, Termination Scheme and 12:1 SerDes in 40-nm CMOS

K. Shiba, T. Omori, K. Ueyoshi, S. Takamaeda-Yamazaki, M. Motomura, M. Hamada, T. Kuroda

IEEE International Symposium on Circuits and Systems (ISCAS) 2022年5月査読有り筆頭著者

A 5-GHz 0.15-mm² Collision-Avoiding RFID Employing Complementary Pass-Transistor Adiabatic Logic With an Inductively Connected External Antenna in 0.18-μm CMOS

Saito Shibata, Reiji Miura, Yoshiki Sawabe, Kota Shiba, Atsutake Kosuge, Mototsugu Hamada, Tadahiro Kuroda

IEEE Solid-State Circuits Letters 5 268-271 2022年査読有り

A Physical Verification Methodology for 3D-ICs Using Inductive Coupling

Tatsuo Omori, Kota Shiba, Atsutake Kosuge, Mototsugu Hamada, Tadahiro Kuroda

2021 IEEE Electrical Design of Advanced Packaging and Systems (EDAPS) 1-3 2021年12月15日査読有り

A 5-GHz 0.15-mm² Collision Avoidable RFID Employing Complementary Pass-Transistor Adiabatic Logic with an Inductively Connected External Antenna

S. Shibata, R. Miura, Y. Sawabe, K. Shiba, A. Kosuge, M. Hamada, T. Kuroda

IEEE Asian Solid-State Circuits Conference (A-SSCC) 5 268-271 2021年11月査読有り

Area-Efficient Multi-Hop Inductive Coupling Interface for 3D-Stacked Memory with 0.23-V Transmitter and Sub-10-μm Coil Design

K. Shiba, T. Omori, M. Hamada, T. Kuroda

IEEE European Solid-State Circuits Conference (ESSCIRC) 3 370-373 2021年9月査読有り筆頭著者