論文

査読有り
2010年

Comparative study on delay degrading estimation due to NBTI with circuit/instance/transistor-level stress probability consideration

PROCEEDINGS OF THE ELEVENTH INTERNATIONAL SYMPOSIUM ON QUALITY ELECTRONIC DESIGN (ISQED 2010)
  • Hiroaki Konoura
  • ,
  • Yukio Mitsuyama
  • ,
  • Masanori Hashimoto
  • ,
  • Takao Onoye

開始ページ
646
終了ページ
651
記述言語
英語
掲載種別
研究論文(国際会議プロシーディングス)
出版者・発行元
IEEE

NBTI degradation proceeds while a negative bias is applied to the gate of PMOS, whereas it recovers while a positive bias is applied. Therefore, PMOS stress (ON) probability has a strong impact on circuit timing degradation due to NBTI effect. This paper evaluates how the granularity of stress probability calculation affects NBTI prediction using the state-of-the-art long term prediction model. Experimental results show that the prediction accuracy of timing degradation due to NBTI effect is heavily dependent on granularity of stress probability consideration in timing analysis.

リンク情報
Web of Science
https://gateway.webofknowledge.com/gateway/Gateway.cgi?GWVersion=2&SrcAuth=JSTA_CEL&SrcApp=J_Gate_JST&DestLinkType=FullRecord&KeyUT=WOS:000393299700097&DestApp=WOS_CPL
ID情報
  • ISSN : 1948-3287
  • Web of Science ID : WOS:000393299700097

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