三浦幸也 (Yukiya Miura) - マイポータル

基本情報

所属: 東京都立大学システムデザイン学部電子情報システム工学科教授

J-GLOBAL ID: 200901078538898470
researchmap会員ID: 1000165827

研究キーワード

研究分野

受賞

2006年

Forum on Information Technology 2006 論文賞

論文

A Method for Measuring Process Variations in the FPGA Chip Considering the Effect of Wire Delay.

Yukiya Miura, Shingo Tsutsumi

27th IEEE International Symposium on On-Line Testing and Robust System Design(IOLTS) 1-6 2021年
Aging Estimation ofMOS FETsUsingAging-Tolerant/Aged Ring Oscillators

Yukiya Miura, Tatsunori Ikeda

IEEJ TRANSACTIONS ON ELECTRICAL AND ELECTRONIC ENGINEERING 15(10) 1475-1481 2020年10月
Innovative Test Practices in Asia.

Takeshi Iwasaki, Masao Aso, Haruji Futami, Satoshi Matsunaga, Yousuke Miyake, Takaaki Kato, Seiji Kajihara, Yukiya Miura, Smith Lai, Gavin Hung …

38th IEEE VLSI Test Symposium(VTS) 1-1 2020年
Soft Error Tolerance of Power-Supply-Noise Hardened Latches.

Yukiya Miura, Yuya Kinoshita

26th IEEE International Symposium on On-Line Testing and Robust System Design(IOLTS) 1-6 2020年
On-Chip Delay Measurement for Degradation Detection And Its Evaluation under Accelerated Life Test

Yousuke Miyake, Takaaki Kato, Seiji Kajihara, Masao Aso, Haruji Futami, Satoshi Matsunaga, Yukiya Miura

2020 26TH IEEE INTERNATIONAL SYMPOSIUM ON ON-LINE TESTING AND ROBUST SYSTEM DESIGN (IOLTS 2020) 1-6 2020年
Development of FF Circuits for Measures Against Power Supply Noise.

Yukiya Miura, Miyuki Inoue, Yuya Kinoshita

25th IEEE International Symposium on On-Line Testing and Robust System Design(IOLTS) 48-51 2019年
Simulation-based analysis of FF behavior in presence of power supply noise

Yukiya Miura, Takuya Yamamoto

2017 IEEE 23rd International Symposium on On-Line Testing and Robust System Design, IOLTS 2017 151-156 2017年9月19日査読有り
Temperature and Voltage Measurement for Field Test Using an Aging-Tolerant Monitor

Yousuke Miyake, Yasuo Sato, Seiji Kajihara, Yukiya Miura

IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS 24(11) 3282-3295 2016年11月査読有り
LSI aging estimation using ring oscillators

Yukiya Miura, Tatsunori Ikeda

Proceedings - 2015 20th IEEE European Test Symposium, ETS 2014 1-2 2015年6月29日査読有り
A Noise-tolerant Master-slave Flip-flop

Yukiya Miura, Yoshihiro Ohkawa

PROCEEDINGS OF THE 2014 IEEE 20TH INTERNATIONAL ON-LINE TESTING SYMPOSIUM (IOLTS) 55-61 2014年査読有り
An On-Chip Digital Environment Monitor for Field Test

Seiji Kajihara, Yousuke Miyake, Yasuo Sato, Yukiya Miura

2014 IEEE 23RD ASIAN TEST SYMPOSIUM (ATS) 254-257 2014年査読有り
Temperature and Voltage Estimation Using Ring-Oscillator-Based Monitor for Field Test

Yousuke Miyake, Yasuo Sato, Seiji Kajihara, Yukiya Miura

2014 IEEE 23RD ASIAN TEST SYMPOSIUM (ATS) 156-161 2014年査読有り
DART: Dependable VLSI Test Architecture and Its Implementation

Yasuo Sato, Seiji Kajihara, Tomokazu Yoneda, Kazumi Hatayama, Michiko Inoue, Yukiya Miura, Satoshi Ohtake, Takumi Hasegawa, Motoyuki Sato, Kotaro Shimamura

PROCEEDINGS INTERNATIONAL TEST CONFERENCE 2012 1-10 2012年査読有り
On-chip Temperature and Voltage Measurement for Field Testing

Yukiya Miura, Yasuo Sato, Yousuke Miyake, Seiji Kajihara

2012 17TH IEEE EUROPEAN TEST SYMPOSIUM (ETS) 1-1 2012年査読有り
Dual edge triggered flip-flops for noise blocking and application to signal delay detection

Yoshihiro Ohkawa, Yukiya Miura

Proceedings of the Asian Test Symposium 119-124 2012年査読有り
Dual Edge Triggered Flip-Flops for Noise Aware Design

Yukiya Miura

2011 16TH IEEE EUROPEAN TEST SYMPOSIUM (ETS) 217-217 2011年査読有り
A supply current testable register string DAC of decoder type

Masaki Hashizume, Yutaka Hata, Hiroyuki Yotsuyanagi, Yukiya Miura

11th International Symposium on Communications and Information Technologies, ISCIT 2011 58-63 2011年査読有り
On estimation of NBTI-induced delay degradation

Mitsumasa Noda, Seiji Kajihara, Yasuo Sato, Kohei Miyasett, Xiaoqing Wen, Yukiya Miura

2010 15th IEEE European Test Symposium, ETS'10 107-111 2010年査読有り
A Circuit Failure Prediction Mechanism (DART) for High Field Reliability

Yasuo Sato, Seiji Kajihara, Yukiya Miura, Tomokazu Yoneda, Satoshi Ohtake, Michiko Inoue, Hideo Fujiwara

2009 IEEE 8TH INTERNATIONAL CONFERENCE ON ASIC, VOLS 1 AND 2, PROCEEDINGS 581-+ 2009年査読有り
Adaptive fault diagnosis of analog circuits by operation-region model and X-Y zoning method

Yukiya Miura, Jiro Kato

JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS 24(1-3) 223-233 2008年6月査読有り