1995年4月
ATM IN B-ISDN COMMUNICATION-SYSTEMS AND VLSI REALIZATION
IEEE JOURNAL OF SOLID-STATE CIRCUITS
- ,
- 巻
- 30
- 号
- 4
- 開始ページ
- 341
- 終了ページ
- 347
- 記述言語
- 英語
- 掲載種別
- 研究論文(学術雑誌)
- 出版者・発行元
- IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
The Asynchronous Transfer Mode (ATM) is considered to be a key technology for B-ISDN, This paper discusses VLSI trends and how VLSI's can be applied to realize ATM switching node systems for B-ISDN, Implementing a practical ATM node system will require the development of technologies such as high-throughput ATM switch LSI's with up to 10 Gb/s capacity and SDH termination technology based on optical fiber transmission, An ATM traffic-handling mechanism with Quality of Service (QoS) controls such as ATM layer performance monitoring, virtual channel handling, usage parameter control, and VP shaping requires several hundred thousand logic gates and several megabytes of high-speed static RAM; VLSI's must be introduced if such mechanisms are to be implemented, ATM node system architecture is based on design principles of a building-block-type structure and hierarchical multiplexing, The basic ATM call handling module, the AHM, is composed mainly of a line termination block and a self-routing switch block; we analyzed this module from the viewpoint of the amount of hardware it requires, Finally, future ATM node systems are discussed on the basis of 0.2-mu m VLSI development trends and hardware requirements such as the need for ultrahigh integration of logic gate with memory, multichip modules, and low power dissipation technology.
- リンク情報
- ID情報
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- ISSN : 0018-9200
- eISSN : 1558-173X
- Web of Science ID : WOS:A1995QU17700002