Ryuichi Sakamoto - My portal

Profile Information

Affiliation: Global Scientific Information and Computing Center, Tokyo Institute of Technology

J-GLOBAL ID: 201901009267215130
researchmap Member ID: B000355515

Research Areas

Informatics / Computer systems /

Research History

Aug, 2021 - Present

Global Scientific Information and Computing Center, Tokyo Institute of Technology
Oct, 2016 - Jul, 2021

The Graduate School of Information Science and Technology, The University of Tokyo
Apr, 2015 - Sep, 2016

The University of Tokyo

Awards

Aug, 2018

コンピュータサイエンス領域奨励賞, 情報処理学会

坂本龍一

Papers

Dynamic Power Management for 5G Small Cell Base Station

Yuta Suzuki, Ryuichi Sakamoto, Hiroshi Nakamura

2021 International Conference on COMmunication Systems and NETworkS, COMSNETS 2021, 492-500, Jan 5, 2021
A Preliminary evaluation of building block computing systems

Sayaka Terashima, Takuya Kojima, Hayate Okuhara, Kazusa Musha, Hideharu Amano, Ryuichi Sakamoto, Masaaki Kondo, Mitaro Namiki

Proceedings - 2019 IEEE 13th International Symposium on Embedded Multicore/Many-Core Systems-on-Chip, MCSoC 2019, 312-319, Oct, 2019
Scalable deep neural network accelerator cores with cubic integration using through chip interface

Ryuichi Sakamoto, Ryo Takata, Jun Ishii, Masaaki Kondo, Hiroshi Nakamura, Tetsui Ohkubo, Takuya Kojima, Hideharu Amano

Proceedings - International SoC Design Conference 2017, ISOCC 2017, 155-156, May 29, 2018 Peer-reviewed
OpenCL Runtime for OS-Driven Task Pipelining on Heterogeneous Accelerators.

Atsushi Koshiba, Ryuichi Sakamoto, Mitaro Namiki

24th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, RTCSA 2018, Hakodate, Japan, August 28-31, 2018, 236-237, 2018 Peer-reviewed
Analyzing Resource Trade-offs in Hardware Overprovisioned Supercomputers.

Ryuichi Sakamoto, Tapasya Patki, Thang Cao, Masaaki Kondo, Koji Inoue, Masatsugu Ueda, Daniel A. Ellsworth, Barry Rountree,Martin Schulz

2018 IEEE International Parallel and Distributed Processing Symposium, IPDPS 2018, Vancouver, BC, Canada, May 21-25, 2018, 526-535, 2018 Peer-reviewed
Production Hardware Overprovisioning: Real-World Performance Optimization Using an Extensible Power-Aware Resource Management Framework

Ryuichi Sakamoto, Thang Cao, Masaaki Kondo, Koji Inoue, Masatsugu Ueda, Tapasya Patki, Daniel Ellsworth, Barry Rountree, Martin Schulz

Proceedings - 2017 IEEE 31st International Parallel and Distributed Processing Symposium, IPDPS 2017, 957-966, Jun 30, 2017 Peer-reviewed
A software development environment for a multi-chip convolutional network accelerator

Tetsui Ohkubo, Mankit Sit, Hideharu Amano, Ryo Takata, Ryuichi Sakamoto, Masaaki Kondo

International Journal of Computers and their Applications, 24(2) 81-90, Jun 1, 2017
Namacha: A software development environment for a multi-chip convolutional network accelerator

Tetsui Ohkubo, Ryo Takata, Ryuichi Sakamoto, Masaaki Kondo, Hideharu Amano

Proceedings of the 32nd International Conference on Computers and Their Applications, CATA 2017, 101-106, 2017
The Design and Implementation of Scalable Deep Neural Network Accelerator Cores.

Ryuichi Sakamoto, Ryo Takata, Jun Ishii, Masaaki Kondo, Hiroshi Nakamura, Tetsui Ohkubo, Takuya Kojima, Hideharu Amano

11th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, MCSoC 2017, Seoul, South Korea, September 18-20, 2017, 13-20, 2017 Peer-reviewed
An Operating System Guided Fine-Grained Power Gating Control Based on Runtime Characteristics of Applications

Atsushi Koshiba, Mikiko Sato, Kimiyoshi Usami, Hideharu Amano, Ryuichi Sakamoto, Masaaki Kondo, Hiroshi Nakamura, Mitaro Namiki

IEICE TRANSACTIONS ON ELECTRONICS, E99C(8) 926-935, Aug, 2016 Peer-reviewed
A Fine-Grained Power Gating Control on Linux Monitoring Power Consumption of Processor Functional Units

Atsushi Koshiba, Motoki Wada, Ryuichi Sakamoto, Mikiko Sato, Tsubasa Kosaka, Kimiyoshi Usami, Hideharu Amano, Masaaki Kondo, Hiroshi Nakamura, Mitaro Namiki

IEICE TRANSACTIONS ON ELECTRONICS, E98C(7) 559-568, Jul, 2015 Peer-reviewed
Design and evaluation of fine-grained power-gating for embedded microprocessors.

Masaaki Kondo, Hiroaki Kobayashi, Ryuichi Sakamoto, Motoki Wada, Jun Tsukamoto, Mitaro Namiki, Weihan Wang, Hideharu Amano, Kensaku Matsunaga, Masaru Kudo …

Design, Automation & Test in Europe Conference & Exhibition, DATE 2014, Dresden, Germany, March 24-28, 2014, 1-6, 2014 Peer-reviewed
Design and Control Methodology for Fine Grain Power Gating based on Energy Characterization and Code Profiling of Microprocessors

Kimiyoshi Usami, Masaru Kudo, Kensaku Matsunaga, Tsubasa Kosaka, Yoshihiro Tsurui, Weihan Wang, Hideharu Amano, Hiroaki Kobayashi, Ryuichi Sakamoto, Mitaro Namiki …

2014 19TH ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE (ASP-DAC), 843-848, 2014 Peer-reviewed
Demonstration of a heterogeneous multi-core processor with 3-D inductive coupling links.

Yusuke Koizumi, Noriyuki Miura, Yasuhiro Take, Hiroki Matsutani, Tadahiro Kuroda, Hideharu Amano, Ryuichi Sakamoto, Mitaro Namiki, Kimiyoshi Usami, Masaaki Kondo …

23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, 1, 2013 Peer-reviewed
A scalable 3D heterogeneous multi-core processor with inductive-coupling thruchip interface.

Noriyuki Miura, Yusuke Koizumi, Eiichi Sasaki, Yasuhiro Take, Hiroki Matsutani, Tadahiro Kuroda, Hideharu Amano, Ryuichi Sakamoto, Mitaro Namiki, Kimiyoshi Usami …

2013 IEEE Hot Chips 25 Symposium (HCS), Stanford University, CA, USA, August 25-27, 2013, 1, 2013 Peer-reviewed
A scalable 3D heterogeneous multi-core processor with inductive-coupling thruchip interface.

Noriyuki Miura, Yusuke Koizumi, Eiichi Sasaki, Yasuhiro Take, Hiroki Matsutani, Tadahiro Kuroda, Hideharu Amano, Ryuichi Sakamoto, Mitaro Namiki, Kimiyoshi Usami …

2013 IEEE Symposium on Low-Power and High-Speed Chips, COOL Chips XVI, Yokohama, Japan, April 17-19, 2013, 1-3, 2013 Peer-reviewed
A Scalable 3D Heterogeneous Multicore with an Inductive ThruChip Interface.

Noriyuki Miura, Yusuke Koizumi, Yasuhiro Take, Hiroki Matsutani, Tadahiro Kuroda, Hideharu Amano, Ryuichi Sakamoto, Mitaro Namiki, Kimiyoshi Usami, Masaaki Kondo …

IEEE Micro, 33(6) 6-15, 2013 Peer-reviewed
An OpenCL runtime library for embedded multi-core accelerator

Ryuichi Sakamoto, Mikiko Sato, Yusuke Koizumi, Hideharu Amano, Mitaro Namiki

Proceedings - 18th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, RTCSA 2012 - 2nd Workshop on Cyber-Physical Systems, Networks, and Applications, CPSNA, 419-422, 2012 Peer-reviewed
DYNAMIC POWER CONTROL WITH A HETEROGENEOUS MULTI-CORE SYSTEM USING A 3-D WIRELESS INDUCTIVE COUPLING INTERCONNECT

Yusuke Koizumi, Hideharu Amano, Hiroki Matsutani, Noriyuki Miura, Tadahiro Kuroda, Ryuichi Sakamoto, Mitaro Namik, Kimiyoshi Usami, Masaaki Kondo, Hiroshi Nakamura

2012 INTERNATIONAL CONFERENCE ON FIELD-PROGRAMMABLE TECHNOLOGY (FPT'12), 293-296, 2012 Peer-reviewed
CMA-Cube: A scalable reconfigurable accelerator with 3-D wireless inductive coupling interconnect.

Yusuke Koizumi, Eiichi Sasaki, Hideharu Amano, Hiroki Matsutani, Yasuhiro Take, Tadahiro Kuroda, Ryuichi Sakamoto, Mitaro Namiki, Kimiyoshi Usami, Masaaki Kondo …

22nd International Conference on Field Programmable Logic and Applications (FPL), Oslo, Norway, August 29-31, 2012, 543-546, 2012 Peer-reviewed

Misc.

Compiler Toolchain of Deep Learning Accelerator with Wireless 3D Stacked Chips

116(510) 357-362, Mar 9, 2017
スケーラブルなディープラーニング向けアクセラレータチップの設計と評価 (コンピュータシステム)

高田遼, 石川潤, 坂本龍一, 近藤正章, 中村宏, 大久保徹以, 小島拓也, 天野英晴

電子情報通信学会技術研究報告 = IEICE technical report : 信学技報, 116(336) 1-6, Nov 28, 2016