論文

査読有り
2015年4月

Computational Study of Effects of Surface Roughness and Impurity Scattering in Si Double-Gate Junctionless Transistors

IEEE TRANSACTIONS ON ELECTRON DEVICES
  • Masato Ichii
  • ,
  • Ryoma Ishida
  • ,
  • Hideaki Tsuchiya
  • ,
  • Yoshinari Kamakura
  • ,
  • Nobuya Mori
  • ,
  • Matsuto Ogawa

62
4
開始ページ
1255
終了ページ
1261
記述言語
英語
掲載種別
研究論文(学術雑誌)
DOI
10.1109/TED.2015.2399954
出版者・発行元
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC

Electron transport in Si double-gate junctionless transistors (JLTs) is simulated on the basis of the multisubband Monte Carlo method, considering acoustic phonons, intervalley phonons, ionized impurities (IIs), and surface roughness (SR) scattering. It is demonstrated that JLTs can actually minimize the mobility degradation caused by SR scattering and improve the current drivability. On the other hand, II scattering is confirmed to degrade the current drivability compared with conventional MOSFETs with an intrinsic channel. However, the performance degradation in JLTs due to II scattering is shown to be insignificant, owing to the screening effect of free carriers and the forward scattering properties of high-speed carriers. Furthermore, by extracting a backscattering coefficient, the screening effect and the forward scattering properties are shown to more mitigate II scattering as the gate voltage increases.

リンク情報
DOI
https://doi.org/10.1109/TED.2015.2399954
Web of Science
https://gateway.webofknowledge.com/gateway/Gateway.cgi?GWVersion=2&SrcAuth=JSTA_CEL&SrcApp=J_Gate_JST&DestLinkType=FullRecord&KeyUT=WOS:000351753900027&DestApp=WOS_CPL
ID情報
  • DOI : 10.1109/TED.2015.2399954
  • ISSN : 0018-9383
  • eISSN : 1557-9646
  • Web of Science ID : WOS:000351753900027

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