2005年4月
A built-in technique for probing power supply and ground noise distribution within large-scale digital integrated circuits
IEEE JOURNAL OF SOLID-STATE CIRCUITS
- ,
- ,
- 巻
- 40
- 号
- 4
- 開始ページ
- 813
- 終了ページ
- 819
- 記述言語
- 英語
- 掲載種別
- 研究論文(学術雑誌)
- DOI
- 10.1109/JSSC.2005.845559
- 出版者・発行元
- IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Design of noise detector circuits as compact as standard logic cells is proposed. High-density large-scale digital integrated circuits that embed such built-in noise detectors enable in-depth characterization of dynamic power supply and ground noises. Dependence of power supply and ground voltage drops on the location of active cell rows within 1.8-V standard cell-based digital circuits are consistently measured by 1.8- and 2.5-V built-in detectors fabricated in a 0.18-mu m CMOS triple-well technology. Measurements also show that ground noise distribution is distinctively more localized than power supply counterparts due to the presence of a substrate.
- リンク情報
- ID情報
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- DOI : 10.1109/JSSC.2005.845559
- ISSN : 0018-9200
- Web of Science ID : WOS:000228564400002