1994年
A Parallel Algorithm for Time-Slot Assignment Problems in TDM Hierarchical Switching Systems
IEEE Transactions on Communications
- ,
- 巻
- 42
- 号
- 10
- 開始ページ
- 2890
- 終了ページ
- 2898
- 記述言語
- 英語
- 掲載種別
- DOI
- 10.1109/26.328959
This paper presents a parallel algorithm for timeslot assignment problems in TDM hierarchical switching systems, based on the neural network model. The TDM systems are operated. in repetitive frames composed of several Time-Slots. A Time-Slot represents a switching configuration where one packet is transmitted through an I/O line. The goal of our algorithm is to find conflict-free Time-Slot assignments for given switching demands. The algorithm runs on a maximum of n2×m processors for m-Time-Slot problems in n×n TDM systems. In small problems up to a 24×24 TDM system, the algorithm can find the optimum solution in a nearly constant time, when it is performed on n2×m processors. © 1994 IEEE
- リンク情報
- ID情報
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- DOI : 10.1109/26.328959
- ISSN : 0090-6778
- SCOPUS ID : 0028517560