大山 光男

レイテンシを短縮した32bitURR浮動小数点数演算器の設計と実装 

第４回情報科学技術フォーラム(FIT2005) pp.157-158 2005年  

A Design of a Fast Floating-Point Unit for URR Floating-Point Arithmetic 

A book of Abstracts SCAN 2000/Interval 2000 2000年  

計算機アーキテクチャ教育・研究ツールとしてのFPGA開発システムの導入と開発事例 

倉敷芸術科学大学紀要 (4) 53-62 1999年  

Arrangement of FPGA Design System for Education and Research in Computer Architecture and a Design of an Educational Microprocessor. 

The Bulletin of Kurashiki University of Science and the Arts. (4) 53-62 1999年  

内部観察機能を強化した教育用16ビットマイクロプロセッサの設計とFPGAによる実現 

電子情報通信学会技術研究報告VLD98-120,CPSY98-140 1998年  

Design of a 16-bit Microprocessor for Educational Use with Internal Observation Functions and Its Implementation on a FPGA. 

Technical Report of IEICE. VLD98-120, CPSY98-140. 1998年  

URR浮動小数点数演算のためのパイプライン加減算器の設計とFPGAによる実現 

情報処理学会研究報告 97-HPC-69 19-24 1997年  

Design of a Pipelined Adder/Subtracter for URR Floating-Point Arithmetic and its Experimental Implementation on FPGAs. 

The Special Interest Group Notes of IPSJ 97-HPC-69 19-24 1997年  

Fast Separation and Combination of an Exponent and a Fraction for URR Floating-Point Arithmetic and Its Application to a Pipelined Adder/Subtracter. (jointly worked) 

Proc. of SCAN97 1997年  

3重指数分割に基づく浮動小数点数演算のための指数と仮数の高速分離結合回路の設計と評価 

情報処理学会論文誌 37(4) 613-623 1996年  

A Circuit to Separate and to Connect the Exponent Part and the Mantissa Part for URR Floating-Point Arithmetic and its Application to a URR Processor 

Transactions of Information Processing Society of Japan 35(8) 1642-1651 1994年  

A self-Learning Digital Neural Networks Using Wafer-Scale LSI (jointly worked) 

IEEE Journal of Solid-State Circuits 28(2) 106-114 1993年  

A Self-Learning Neural Network Composed of 1152 Digital Neurons in Wafer-Scale LSI. (jointly worked) 

Proc. of IJCNN 3 1844-1849 1991年  

A Digital Neuro-Chip Unlimited Connectability for Large Scale Neural Networks. (jointly worked) 

Proc. of IJCNN 2 163-169 1989年  

An Index-Free Full-Text Search Machine for Large Japanese Text Bases. (jointly worked) 

Proc. of Advanced Databases System Symposium'89 75-82 1989年  

High speed digital control circuit for nanometric electron beam lithography.(jointly worked) 

Proc. of SPIE 923 246-252 1988年  

A high speed nanometric electron beam lithography system. (jointly worked) 

Proc. of SPIE 733 234-239 1987年