HARIYAMA Masanori

J-GLOBAL         Last updated: Apr 2, 2018 at 17:04
 
Avatar
Name
HARIYAMA Masanori
E-mail
hariyamaecei.tohoku.ac.jp
URL
http://db.tohoku.ac.jp/whois/e_detail/7bec791b67ea6dbe6a79073ec8cc0771.html
Affiliation
Tohoku University
Section
Graduate School of Information Sciences Department of Computer and Mathematical Sciences Computation Science and Systems Intelligent Integrated Systems
Job title
Professor

Research Areas

 
 

Awards & Honors

 
Oct 2008
情報通信応用フィールドプログラマブルVLSIの開発, 研究奨励賞, 石田記念財団
 
Oct 2008
Evaluation of an Heterogeneous Multi-Core Architecture with Dynamically Reconfigurable ALU Arrays, Best Research Award, Intel Corporation
 
Mar 2006
ロジックインメモリアーキテクチャVLSIとその応用展開, ロジックインメモリアーキテクチャVLSIとその応用展開, 丸文研究交流財団
 
May 2005
リアルワールド知能集積システム用プロセッサの開発, 研究開発奨励賞, 情報処理学会
 
Mar 2002
面積・時間積最小化での消費エネルギー最小化のためのハイレベルシンセシス, 学術奨励賞, 電子情報通信学会
 

Published Papers

 
An FPGA Architecture for Text Search Using a Wavelet-Tree-Based Succinct-Data-Structure
Hasitha Muthumala Waidyasooriya, Daisuke Ono, Masanori Hariyama, Michitaka Kameyama
International Conference on Parallel and Distributed Processing Techniques and Applications(PDPTA)   354-359   Jul 2105   [Refereed]
Architecture of an FPGA-Based Heterogeneous System for Code-Search Problems
Hiradate Y., Waidyasooriya H.M., Hariyama M., Harada M.
Lecture Notes in Computer Science   10776    Mar 2018   [Refereed]
Implementation of an FPGA Accelerator for Text Search Using a Wavelet-Tree-Based Succinct-Data-Structure
Taisuke Ono, Hasitha Muthumala Waidyasooriya, Masanori Hariyama
13th International Conference on High-Performance and Embedded Architectures and Compilers (HiPEAC)   1-12   Jan 2018   [Refereed]
BEHAVIOR ANALYSIS OF CHILDREN USING A HIGH-ACCURACY GPS SYSTEM
M. Hariyama, N. Miyamoto, M. Koshiba, H. Watanabe, S. Ito, S. Shimazaki, T. Kubota, M. Senda, S. Taniguchi
12th International Neuroscience and Biological Psychiatry Regional ISBS Conference      Jul 2017   [Invited]
OpenCL-Based Implementation of an FPGA Accelerator for Molecular Dynamics Simulation
Hasitha Muthumala Waidyasooriya, Masanori Hariyama and Kota Kasahara
Information Engineering Express, International Institute of Applied Informatics   3(2) 11-23   Jul 2017   [Refereed]
Taisuke Ono, Hasitha Muthumala Waidyasooriya, Masanori Hariyama and Tsukasa Ishigaki
Proc. 18th IEEE/ACIS International Conference on Software Engineering, Artificial Intelligence, Networking and Parallel/Distributed Computing (SNPD)   357-362   Jun 2017   [Refereed]
Tsukasa Endo, Hasitha Muthumala Waidyasooriya and Masanori Hariyama
Software Engineering, Artificial Intelligence, Networking and Parallel/Distributed Computing, Springer International Publishing   57-89   Jun 2017   [Refereed]
Hasitha Muthumala Waidyasooriya, Tsukasa Endo, Masanori Hariyama and Yasuo Ohtera
International Journal of Reconfigurable Computing   2017    Apr 2017   [Refereed]
Hasitha Muthumala Waidyasooriya, Masanori Hariyama and Kota Kasahara
International Journal of Networked and Distributed Computing   5(1) 52-61   Jan 2017   [Refereed]
Multiscale, Multiphysics Computational Chemistry Methods based on Artificial Intelligence Integrated Ultra-Accelerated Quantum Molecular Dynamics for the Application to Automotive Emission Control
Akira Miyamoto, Kenji Inaba, Yukie Ishizawa, Manami Sato, Rei Komuro, Masashi Sato, Ryo Sato, Patrick Bonnaud, Ryuji Miura, Ai Suzuki, Naoto Miyamoto, Nozomu Hatakeyama, Masanori Hariyama
SAE/JSAE 2016 Small Engine Technology Conference and Exhibition      Nov 2016   [Refereed]
S. Tatsumi, M. Hariyama, N. Ikoma
Journal of Advanced Computational Intelligence and Intelligent Informatics      Sep 2016   [Refereed]
H. M. Waidyasooriya, M. Hariyama and Y. Ohtera
Progress in Electromagnetic Research Symposium (PIERS)   4719-4719   Aug 2016   [Refereed]
Hasitha Muthumala Waidyasooriya, and Masanori Hariyama
15th IEEE/ACIS International Conference on Computer and Information Science (ICIS 2016)   109-114   Jun 2016   [Refereed]
Hasitha Muthumala Waidyasooriya, Masanori Hariyama and Kota Kasahara
15th IEEE/ACIS International Conference on Computer and Information Science (ICIS 2016)   115-119   Jun 2016   [Refereed]
Hasitha Muthumala Waidyasooriya and Masanori Hariyama
IEEE Transactions on Parallel and Distributed Systems   27(5) 1358-1372   May 2016   [Refereed]
Hardware-Oriented Succinct-Data-Structure for Text Processing Based on Block-Size-Constrained Compression
Hasitha Muthumala Waidyasooriya, Daisuke Ono and Masanori Hariyama
International Journal of Computer Information Systems and Industrial Management Applications   8 1-11   Jan 2016   [Refereed]
Yasuhiro Takei, Hasitha Muthumala Waidyasooriya, Masanori Hariyama and Michitaka Kameyama
IEICE Transaction on Fundamentals   E98-A(12) 2658-2669   Dec 2015   [Refereed]
Accurate Liver Extraction Using a Local-Thickness-Based Graph-Cut Approach
Yasuhiro Kobayashi, Masanori Hariyama, Mitsugi Shimoda, Keiichi Kubota
Proc.International Conference on Image Processing, Computer Vision, and Pattern Recognition(IPCV)   315-318   Jul 2015   [Refereed]
Automatic Estimation of Optimal Resected Liver Regions Considering Practical Surgical Conditions
Masanori Hariyama, Takeaki Suzuki, Keisuke Maeda, Mitsugi Shimoda, Keiichi Kubota
Proc.International Conference on Image Processing, Computer Vision, and Pattern Recognition(IPCV)   356-360   Jul 2015   [Refereed]
Evaluation of an FPGA-Based Shortest-Path-Search Accelerator
Yasuhiro Takei, Masanori Hariyama, Michitaka Kameyama
International Conference on Parallel and Distributed Processing Techniques and Applications(PDPTA)   613-617   Jul 2015   [Refereed]
FPGA-Oriented Design of an FDTD Accelerator Based on Overlapped Tiling
Yasuhiro Takei, Hasitha Muthumala Waidyasooriya, Masanori Hariyama, Michitaka Kameyama
International Conference on Parallel and Distributed Processing Techniques and Applications(PDPTA)   72-77   Jul 2015   [Refereed]
OpenCL-based Design of an FPGA Accelerator for Phase-Based Correspondence Matching
Shunsuke Tatsumi, Masanori Hariyama, Mamoru Miura, Koichi Ito, Takafumi Aoki
Proc. International Conference on Parallel and Distributed Processing Techniques and Applications(PDPTA)   613-617   Jul 2015   [Refereed]
Zhengfan Xia, Masanori Hariyama, and Michitaka Kameyama
IEEE Transaction on VLSI Systems   23(4) 619-630   2015   [Refereed]
Hasitha Muthumala Waidyasooriya, Masanori Hariyama, Yasuhiro Takei, and Michitaka Kameyama
Journal of Computational Engineering   2014    Dec 2014   [Refereed]
Hasitha Muthumala Waidyasooriya, Daisuke Ono, Masanori Hariyama and Michitaka Kameyama
IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)   639-642   Nov 2014   [Refereed]
An SIMD Architecture for Shortest-Path Search and Its FPGA Implementation
Yasuhiro Takei, Masanori Hariyama, Michitaka Kameyama
International Conference on Parallel and Distributed Processing Techniques and Applications(PDPTA)   53-56   Jul 2014   [Refereed]
Liver Extraction from CT Images Based on Liver Structure Models
Masanori Hariyama, Riichi Tanizawa, Mitsugi Shimoda, Keiichi Kubota, Yasuhiro Kobayashi
International Conference on Image Processing, Computer Vision, and Pattern Recognition(IPCV)   170-173   Jul 2014   [Refereed]
Design of an FPGA-Based FDTD Accelerator Using OpenCL
Yasuhiro Takei, Hasitha Muthumala Waidyasooriya, Masanori Hariyama,Michitaka Kameyama
International Conference on Parallel and Distributed Processing Techniques and Applications(PDPTA)   371-375   Jul 2014   [Refereed]
Estimation of Resected Liver Regions Using a Tumor Domination Ratio
Masanori Hariyama, Moe Okada, Mitsugi Shimoda, Keiichi Kubota
International Conference on Image Processing, Computer Vision, and Pattern Recognition(IPCV)   52-56   Jul 2014   [Refereed]
An Asynchronous High-Performance FPGA Based on LEDR/Four-Phase-Dual-Rail Hybrid Architecture
Yoshiya Komatsu, Masanori Hariyama and Michitaka Kameyama
Proc. the 5th International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies (HEART)   111-114   Jun 2014   [Refereed]
FPGA-Accelerator for DNA Sequence Alignment Based on an Efficient Data-Dependent Memory Access Scheme
Hasitha Waidyasooriya, Masanori Hariyama and Michitaka Kameyama
Proc. the 5th International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies(HEART)   127-130   Jun 2014   [Refereed]
Hasitha Muthumala Waidyasooriya, Masanori Hariyama, Yasuhiro Takei, and Michitaka Kameyama,
Journal of Computational Engineering   2014    2014   [Refereed]
Yasuhiro Takei, Hasitha Muthumala WAIDYASOORIYA, Masanori Hariyama, Michitaka Kameyama
IEICE Transaction on Fundamentals   E96-A(12) 2576-2586   Dec 2013   [Refereed]
Yoshiya Komatsu, Masanori Hariyama, Michitaka Kameyama
IEICE Transaction on Information and Systems   E96-D(8) 1632-1644   Aug 2013   [Refereed]
Hasitha Muthumala Waidyasooriya, Masanori Hariyama and Michitaka Kameyama
International Conference of the IEEE Engineering in Medicine and Biology Society (EMBS)   651-654   Jul 2013   [Refereed]
Heterogeneous Multicore Platform with Accelerator Templates and Its Implementation on an FPGA with Hard-core CPUs
Yasuhiro Takei, Hasitha Muthumala Waidyasooriya, Masanori Hariyama and Michitaka Kameyama
Proc. International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA)   47-50   Jul 2013   [Refereed]
Reducing Floating-Point Error Based on Residue-Preservation and Its Evaluation on an FPGA
Hasitha Muthumala Waidyasooriya, Hirokazu Takahashi, Yasuhiro Takei, Masanori Hariyama and Michitaka Kameyama
Proc. International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA)   55-58   Jul 2013   [Refereed]
An Area-Efficient Asynchronous FPGA Architecture for Handshake-Component-Based Design
Yoshiya KOMATSU, Masanori HARIYAMA and Michitaka KAMEYAMA
Proc. International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA),   15-18   Jul 2013   [Refereed]
Flexible Ferroelectric-Capacitor Element for Low Power and Compact Logic-in-Memory Architectures
SHOTA ISHIHARA, NORIAKI IDOBATA, MASANORI HARIYAMA, MICHITAKA KAMEYAMA
Journal of Multiple-Valued Logic and Soft Computing   20(5-6) 595-623   2013   [Refereed]
Masanori HARIYAMA, Hasitha Muthumala WAIDYASOORIYA, Yasuhiro TAKEI, and Michitaka KAMEYAMA
Interdisciplinary Information Sciences   18(2) 175-184   Dec 2012   [Refereed]
Yoshitaka HIRAMATSU, Hasitha Muthumala WAIDYASOORIYA, Masanori HARIYAMA, Toru NOJIRI, Kunio UCHIYAMA, and Michitaka KAMEYAMA
IEICE Transaction on Electron   E95-C(12) 1872-1882   Dec 2012   [Refereed]
Xia Zhengfan, Shota Ishihara, Masanori Hariyama, Michitaka Kameyama
IEICE Transaction on Electron   E96-C(8) 1434-1443   Aug 2012   [Refereed]
Architecture of an Asynchronous FPGA for Handshake-Component-Based Design
Yoshiya Komatsu, Masanori Hariyama, and Michitaka Kameyama
The International Conference on Engineering of Reconfigurable Systems and Algorithms(ERSA)   133-136   Jul 2012   [Refereed]
Area-Efficient Design of Asynchronous Circuits Based on Balsa Framework for Synchronous FPGAs
Yoshiya Komatsu, Masanori Hariyama, and Michitaka Kameyama
The International Conference on Engineering of Reconfigurable Systems and Algorithms(ERSA)   113-118   Jul 2012   [Refereed]
Low-Power Heterogeneous Platform for High Performance Computing and Its Application to 2D-FDTD Computation
Hasitha Muthumala Waidyasooriya, Yasuhiro Takei, Masanori Hariyama and Michitaka Kameyama
The International Conference on Engineering of Reconfigurable Systems and Algorithms(ERSA)   147-150   Jul 2012   [Refereed]
Hybrid Single/Double Precision Floating-Point Computation on GPU Accelerators for 2-D FDTD
Hasitha Muthumala Waidyasooriya, Yasuhiro Takei, Masanori Hariyama and Michitaka Kameyama
International Conference on Parallel and Distributed Processing Techniques and Applications (PDPTA)   1001-1002   Jul 2012   [Refereed]
An Asynchronous FPGA Based on Dual/Single-Rail Hybrid Architecture
Zhengfan XIA, Shota ISHIHARA, Masanori HARIYAMA, and Michitaka KAMEYAMA
The International Conference on Engineering of Reconfigurable Systems and Algorithms(ERSA)   139-142   Jul 2012   [Refereed]
Hasitha Muthumala Waidyasooriya, Yasuhiro Takei, Masanori Hariyama, Michitaka Kameyama
IEEE International Symposium on Circuits and Systems(ISCAS)   1339-1342   May 2012   [Refereed]
Zhengfan Xia, Shota Ishihara, Masanori Hariyama, and Michitaka Kameyama
Zhengfan Xia, Shota Ishihara, Masanori Hariyama, and Michitaka Kameyama
IEEE International Symposium on Circuits and Systems(ISCAS)   3017-3020   May 2012   [Refereed]
Hasitha Muthumala Waidyasooriya, Yosuke Ohbayashi, Masanori Hariyama, Michitaka Kameyama
IEICE Trans. Inf. and Syst.   E95-D(2) 354-363   Feb 2012   [Refereed]
Shota ISHIHARA Ryoto TSUCHIYA Yoshiya KOMATSU Masanori HARIYAMA Michitaka KAMEYAMA
IEICE Transaction on Electron   E94-C(10) 1669-1679   Oct 2011   [Refereed]
Hasitha Muthumala Waidyasooriya, Yosuke Ohbayashi, Masanori Hariyama, Michitaka Kameyama
IEEE Transactions on Circuits and Systems for Video Technology   21(10) 1453-1466   Oct 2011   [Refereed]
Shota Ishihara, Masanori Hariyama, Michitaka Kameyama
IEEE Transactions on Very Large Scale Integration Systems(TVLSI)   19(8) 1394-1406   Aug 2011   [Refereed]
An FPGA Based on Synchronous/Asynchroous Hybrid Architecture with Area-Efficient FIFO Interfaces
Masanori Hariyama, Yoshiya Komatsu, Shota Ishihara, Ryoto Tsuchiya, and Michitaka Kameyama
Proc. International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA)   331-334   Jul 2011   [Refereed]
Data-Transfer-Aware Memory Allocation for Dynamically Reconfigurable Accelerators in Heterogeneous Multicore Processors
Yosuke Ohbayashi, Hasitha Muthumala Waidyasooriya, Masanori Hariyama, Michitaka Kameyama
Proc. International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA)   282-288   Jul 2011   [Refereed]
A Switch Block for Multi-Context FPGAs Based on Floating-Gate-MOS Functional Pass-Gates Using Multiple/Binary Valued Hybrid Signals
Shota Ishihara, Noriaki Idobata, Yoshihiro Nakatani, Masanori Hariyama and Michitaka Kameyama
Journal of Multiple-Valued Logic and Soft Computing   17(5-7) 553-580   Jun 2011   [Refereed]
Yoshiya Komatsu, Shota Ishihara, Masanori Hariyama, Michitaka Kameyama
Proceedings of The Asia and South Pacific Design Automation Conference (ASP-DAC)   89-90   Jan 2011   [Refereed]
Hasitha Muthumala Waidyasooriya, Masanori Hariyama, Michitaka Kameyama
IEICE transaction on Fundamentals   E94-A(1) 342-351   Jan 2011   [Refereed]
Hasitha Muthumala Waidyasooriya, Masanori Hariyama, Michitaka Kameyama
IEICE Transaction on Fundamentals   E93-A(12) 2570-2580   Dec 2010   [Refereed]
Implementation of a Low-Power FPGA Based on Self-Adaptive Voltage Control
Shota Ishihara, Zhengfan Xia, Masanori Hariyama, Michitaka Kameyama
Student Organizing International Mini-Conference on Information Electronics Systems   57-58   Oct 2010
Evaluation of a Self-Adaptive Voltage Control Scheme for Low-Power FPGAs
Shota Ishihara, Zhengfan Xia, Masanori Hariyama, Michitaka Kameyama
Journal of Semiconductor Technology and Science (JSTS)   10(3) 165-175   Oct 2010   [Refereed]
Accelerator-Centric Mapping Methodologies for Heterogeneous Multicore Processors
Hasitha Muthumala Waidyasooriya, Masanori Hariyama, and Michitaka Kameyama
Integrated Circuits and Devices in Vietnam(ICDV)   49-54   Aug 2010   [Invited]
Z. Xia, S. Ishihara, M. Hariyama, M. Kameyama
Electronics Letters   46(16) 1116-1117   Aug 2010   [Refereed]
Architecture of an FPGA-Oriented Heterogeneous Multi-core Processor with SIMD-Accelerator Cores
Hasitha Muthumala Waidyasooriya, Masanori Hariyama, Michitaka Kameyama
Proc. International Conference on Engineering of Reconfigurable Systems and Algorithms(ERSA)   179-186   Jul 2010   [Refereed]
Mapping for a Heterogeneous Multi-Core Media Processor Considering the Data Transfer Time
Hasitha Muthumala Waidyasooriya, Daisuke Okumura, Masanori Hariyama, Michitaka Kameyama
Proc. International Conference on Engineering of Reconfigurable Systems and Algorithms(ERSA)   281-282   Jul 2010   [Refereed]
A Field-Programmable VLSI Based on Synchronous/Asynchronous Hybrid Architecture
Masanori Hariyama, Ryoto Tsuchiya, Shota Ishihara, Michitaka Kameyama
Proc. International Conference on Engineering of Reconfigurable Systems and Algorithms(ERSA)   271-274   Jul 2010   [Refereed]
Shota Ishihara, Zhengfan Xia, Masanori Hariyama, and Michitaka Kameyama
Proc. International SoC Design Conference (ISOCC)      Nov 2009   [Refereed]
Acceleration of Optical-Flow Extraction Using Dynamically Reconfigurable ALU Arrays
Hasitha Muthumala Waidyasooriya, Masanori Hariyama and Michitaka Kameyama
International Conference on Engineering of Reconfigurable Systems and Algorithms(ERSA)   291-294   Jul 2009   [Refereed]
A Fine-Grain SIMD Architecture Based on Flexible Ferroelectric-Capacitor Logic
Shota Ishihara, Noriaki Idobata, Masanori Hariyama, Michitaka Kameyama
International Conference on Engineering of Reconfigurable Systems and Algorithms(ERSA)   271-274   Jul 2009   [Refereed]
FPGA Implementation of a High-Speed Stereo Matching Processor Based on Recursive Computation
Masanori Hariyama, Keita Tanji, and Michitaka Kameyama
International Conference on Engineering of Reconfigurable Systems and Algorithms(ERSA)   263-266   Jul 2009   [Refereed]
An Asynchronous Field-Programmable VLSI Using LEDR/4-Phase-Dual-Rail Protocol Converters
Shota Ishihara, Yoshiya Komatsu, Masanori Hariyama, Michitaka Kameyama
International Conference on Engineering of Reconfigurable Systems and Algorithms(ERSA)   145-150   Jul 2009   [Refereed]
Hasitha Muthumala WAIDYASOORIYA, Masanori HARIYAMA and Michitaka KAMEYAMA
IEICE Transaction on Electron.   E92-C(4)    Apr 2009   [Refereed]
Yasuhiro Kobayashi, Masanori Hariyama, Michitaka Kameyamaa
IEEE Transaction on VLSI Systems   17(3) 403-416   Mar 2009   [Refereed]
Shota Ishihara, Masanori Hariyama, and Michitaka Kameyama
Asia and South Pacific Design Automation Conference (ASP-DAC)   119-120   Jan 2009   [Refereed]
Hasitha Muthumala WAIDYASOORIYA, Masanori HARIYAMA and Michitaka KAMEYAMA
IEICE Transaction on Fundamentals   E91-A(12) 3596-3606   Dec 2008   [Refereed]
Yasuhiro Kobayashi, Masanori Hariyama, Michitaka Kameyama
IEICE Transaction on Information and Systems   E91-D(10) 2386-2397   Oct 2008   [Refereed]
Masanori Hariyama, Shota Ishihara, Michitaka Kameyama
IEICE Transactions on Electronics   E91-C(9) 1416-1426   Sep 2008   [Refereed]
Non-volatile Multi-Context FPGAs Using Hybrid Multiple-Valued/Binary Context Switching Signals
Masanori Hariyama, Shota Ishihara, Noriaki Idobata, Michitaka Kameyama
International Conference on Reconfigurable Systems and Algorithms(ERSA)   309-310   Jul 2008   [Refereed]
Implementation of a Multi-Context FPGA Based on Flexible-Context-Partitioning
Waidyasooriya Hasitha Muthumala, Masanori Hariyama, Michitaka Kameyama
International Conference on Reconfigurable Systems and Algorithms(ERSA)   201-207   Jul 2008   [Refereed]
FPGA Implementation of a Vehicle DetectionAlgorithm Using Three-Dimensional Information
Reconfigurable Architectures Workshop      Apr 2008   [Refereed]
Design of a Trinocular-Stereo-Vision VLSI Processor Based on Optimal Scheduling
Masanori HARIYAMA, Naoto YOKOYAMA, Michitaka KAMEYAMA
IEICE Trans. Electron.   E91-C(4) 479-486   Apr 2008   [Refereed]
Hasitha Muthumala Waidyasooriya, Chong Wei Sheng, Masanori Hariyama, Michitaka Kameyama
IEICE Trans. Electron.   E91-C(4) 517-525   Apr 2008   [Refereed]
Waidyasooriya Hasitha Muthumala, Masanori Hariyama, Michitaka Kameyama
IEEE Dallas circuits and systems   59(62)    Nov 2007   [Refereed]
Masanori Hariyama, Shota Ishihara, Chang Chia Wei and Michitaka Kameyama
IEEE Asian Solid-State Circuits Conference(A-SSCC)   380-383   Nov 2007   [Refereed]
Optimal Scheduling and Memory Allocation for Window-Type Image Processing
Yasuhiro Kobayashi, Masanori Hariyama, Michitaka Kameyama
IEICE Transaction   J90-D(5) 1178-1193   May 2007   [Refereed]
Masanori Hariyama and Michitaka Kameyama
IEEE Asia Pacific Conference on Circuits and Systems(APCCAS)   1805-1808   Dec 2006   [Refereed]
Waidyasooriya Hasitha Muthumala, Masanori Hariyama, Michitaka Kameyama
IEEE Asia Pacific Conference on Circuits and Systems(APCCAS)   1266-1269   Dec 2006   [Refereed]
Masanori Hariyama, Waidyasooriya Hasitha Muthumala, Michitaka Kameyama
Asian Solid-State Circuits Conference (A-SSCC)   155-158   Nov 2006   [Refereed]
Masanori Hariyama, Naoto Yokoyama and Michitaka Kameyama
Asian Solid-State Circuits Conference (A-SSCC)   123-126   Nov 2006   [Refereed]
Masanori HARIYAMA, Shigeo YAMADERA, Michitaka KAMEYAMA
IEICE Trans. Electron.   E89-C(11) 1551-1558   Nov 2006   [Refereed]
Masanori HARIYAMA, Shigeo YAMADERA, Michitaka KAMEYAMA
IEICE Trans. Electron.   E89-C(11) 1655-1661   Nov 2006   [Refereed]
Processor Architecture for Road Extraction Based on Projective Transformation
Sunggae Lee, Masanori Hariyama, Michitaka Kameyama
SICE-ICCAS 2006   1446-1450   Oct 2006   [Refereed]
Yoshihiro NAKATANI, Masanori HARIYAMA and Michitaka KAMEYAMA
International Symposium on Multiple-Valued Logic(ISMVL)      May 2006   [Refereed]
Fine-Grained Architectures for Field-Programmable VLSIs
Masanori Hariyama, Michitaka Kameyama
International Workshop on Post-Binary ULSI Systems   1-5   May 2006   [Invited]
Yoshihiro NAKATANI, Masanori HARIYAMA and Michitaka KAMEYAMA
Reconfigurable Architectures Workshop(RAW)      Apr 2006   [Refereed]
Masanori Hariyama, Michitaka Kameyama, Yasuhiro Kobayashi
IEEE Computer Society Anual Symposium on VLSI   193-198   Mar 2006   [Refereed]
Masanori Hariyama, Yasuhiro Kobayashi, Haruka Sasaki, Michitaka Kameyama
IEICE Trans. Fundamentals   E88-A(12) 3516-3522   Dec 2005   [Refereed]
Weisheng Chong,Masanori Hariyama, Michitaka Kameyama
IEICE Trans. Fundamentals   E88-A(12) 3298-3305   Dec 2005   [Refereed]
Masanori Hariyama, Sho Ogata, Michitaka Kameyama, Yasutoshi Morita
IEEE Asian Solid-State Circuits Conference   421-424   Nov 2005   [Refereed]
Masanori Hariyama, Haruka Sasaki, and Michitaka Kameyama
IEICE Trans. Inf. & Syst.   E88-D(7) 1486-1491   Jul 2005   [Refereed]

Misc

 
Next-Generation Intelligent Systems for Real-World Application and Requirements for Media Processors
Michitaka Kameyama and Masanori Hariyama
The Journal of the Institute of Image Information and Television Engineers   63(9) 1182-1184   Sep 2009

Books etc

 
Design of FPGA-Based Computing Systems with OpenCL
Hasitha Muthumala Waidyasooriya, Masanori Hariyama and Kunio Uchiyama
Nov 2017   ISBN:97833196816
FPGAの原理と構成
張山昌論 (Part:Joint Work, 255頁〜272頁)
オーム社   Mar 2016   
Emerging Trends in Image Processing, Computer Vision, and Pattern Recognition
Masanori Hariyama, Mitsugi Shimoda (Part:Joint Work, Chapter 23(Automatic estimation of a resected liver region using a tumor domination ratio))
Morgan Kaufmann Publishers   Jan 2015   ISBN:978-0-12-802015-6
Towards Green ICT
M.Kameyama, M.Hariyama (Part:Joint Work, Chapter 17, pp.265-274, "Interconnect-Aware High-Level Design Methodologies for Low-Power VLSIs")
River Publishers Series in Communications   Jul 2010   
映像情報メディア工学大事典
張山昌論
オーム社   Jun 2010   ISBN:978-4-274-20869-0

Conference Activities & Talks

 
FPGAを用いたヘテロジニアスマルチコアプロセッサのプラットフォーム開発
電子情報通信学会集積回路研究会主催 第2回アクセラレーション技術発表討論会   10 Sep 2010   
リアルワールド知能システムとヘテロジニアスマルチコアアーキテクチャの展望
第8回 SuperH フォーラム   4 Sep 2009   

Research Grants & Projects

 
Robot Electronics System
Project Year: Aug 1993   
Highly-Safe Intelligent Integrated System
Project Year: Aug 1993   
Reconfigurable Architecture and its applications
The Other Research Programs
Project Year: Apr 2000