張山 昌論

J-GLOBALへ         更新日: 18/04/02 17:04
 
アバター
研究者氏名
張山 昌論
 
ハリヤマ マサノリ
eメール
hariyamaecei.tohoku.ac.jp
URL
http://db.tohoku.ac.jp/whois/detail/7bec791b67ea6dbe6a79073ec8cc0771.html
所属
東北大学
部署
大学院情報科学研究科 情報基礎科学専攻 計算科学講座 知能集積システム学分野
職名
教授

研究分野

 
 

受賞

 
2008年10月
石田記念財団 研究奨励賞 情報通信応用フィールドプログラマブルVLSIの開発
 
2008年10月
Intel Corporation Best Research Award Evaluation of an Heterogeneous Multi-Core Architecture with Dynamically Reconfigurable ALU Arrays
 
2006年3月
丸文研究交流財団 ロジックインメモリアーキテクチャVLSIとその応用展開 ロジックインメモリアーキテクチャVLSIとその応用展開
 
2005年5月
情報処理学会 研究開発奨励賞 リアルワールド知能集積システム用プロセッサの開発
 
2002年3月
電子情報通信学会 学術奨励賞 面積・時間積最小化での消費エネルギー最小化のためのハイレベルシンセシス
 

論文

 
An FPGA Architecture for Text Search Using a Wavelet-Tree-Based Succinct-Data-Structure
Hasitha Muthumala Waidyasooriya, Daisuke Ono, Masanori Hariyama, Michitaka Kameyama
International Conference on Parallel and Distributed Processing Techniques and Applications(PDPTA)   354-359   2105年7月   [査読有り]
Architecture of an FPGA-Based Heterogeneous System for Code-Search Problems
Hiradate Y., Waidyasooriya H.M., Hariyama M., Harada M.
Lecture Notes in Computer Science   10776    2018年3月   [査読有り]
Implementation of an FPGA Accelerator for Text Search Using a Wavelet-Tree-Based Succinct-Data-Structure
Taisuke Ono, Hasitha Muthumala Waidyasooriya, Masanori Hariyama
13th International Conference on High-Performance and Embedded Architectures and Compilers (HiPEAC)   1-12   2018年1月   [査読有り]
BEHAVIOR ANALYSIS OF CHILDREN USING A HIGH-ACCURACY GPS SYSTEM
M. Hariyama, N. Miyamoto, M. Koshiba, H. Watanabe, S. Ito, S. Shimazaki, T. Kubota, M. Senda, S. Taniguchi
12th International Neuroscience and Biological Psychiatry Regional ISBS Conference      2017年7月   [招待有り]
OpenCL-Based Implementation of an FPGA Accelerator for Molecular Dynamics Simulation
Hasitha Muthumala Waidyasooriya, Masanori Hariyama and Kota Kasahara
Information Engineering Express, International Institute of Applied Informatics   3(2) 11-23   2017年7月   [査読有り]
Taisuke Ono, Hasitha Muthumala Waidyasooriya, Masanori Hariyama and Tsukasa Ishigaki
Proc. 18th IEEE/ACIS International Conference on Software Engineering, Artificial Intelligence, Networking and Parallel/Distributed Computing (SNPD)   357-362   2017年6月   [査読有り]
Tsukasa Endo, Hasitha Muthumala Waidyasooriya and Masanori Hariyama
Software Engineering, Artificial Intelligence, Networking and Parallel/Distributed Computing, Springer International Publishing   57-89   2017年6月   [査読有り]
Hasitha Muthumala Waidyasooriya, Tsukasa Endo, Masanori Hariyama and Yasuo Ohtera
International Journal of Reconfigurable Computing   2017    2017年4月   [査読有り]
Hasitha Muthumala Waidyasooriya, Masanori Hariyama and Kota Kasahara
International Journal of Networked and Distributed Computing   5(1) 52-61   2017年1月   [査読有り]
Multiscale, Multiphysics Computational Chemistry Methods based on Artificial Intelligence Integrated Ultra-Accelerated Quantum Molecular Dynamics for the Application to Automotive Emission Control
Akira Miyamoto, Kenji Inaba, Yukie Ishizawa, Manami Sato, Rei Komuro, Masashi Sato, Ryo Sato, Patrick Bonnaud, Ryuji Miura, Ai Suzuki, Naoto Miyamoto, Nozomu Hatakeyama, Masanori Hariyama
SAE/JSAE 2016 Small Engine Technology Conference and Exhibition      2016年11月   [査読有り]
S. Tatsumi, M. Hariyama, N. Ikoma
Journal of Advanced Computational Intelligence and Intelligent Informatics      2016年9月   [査読有り]
H. M. Waidyasooriya, M. Hariyama and Y. Ohtera
Progress in Electromagnetic Research Symposium (PIERS)   4719-4719   2016年8月   [査読有り]
Hasitha Muthumala Waidyasooriya, and Masanori Hariyama
15th IEEE/ACIS International Conference on Computer and Information Science (ICIS 2016)   109-114   2016年6月   [査読有り]
Hasitha Muthumala Waidyasooriya, Masanori Hariyama and Kota Kasahara
15th IEEE/ACIS International Conference on Computer and Information Science (ICIS 2016)   115-119   2016年6月   [査読有り]
Hasitha Muthumala Waidyasooriya and Masanori Hariyama
IEEE Transactions on Parallel and Distributed Systems   27(5) 1358-1372   2016年5月   [査読有り]
Hardware-Oriented Succinct-Data-Structure for Text Processing Based on Block-Size-Constrained Compression
Hasitha Muthumala Waidyasooriya, Daisuke Ono and Masanori Hariyama
International Journal of Computer Information Systems and Industrial Management Applications   8 1-11   2016年1月   [査読有り]
Yasuhiro Takei, Hasitha Muthumala Waidyasooriya, Masanori Hariyama and Michitaka Kameyama
IEICE Transaction on Fundamentals   E98-A(12) 2658-2669   2015年12月   [査読有り]
Accurate Liver Extraction Using a Local-Thickness-Based Graph-Cut Approach
Yasuhiro Kobayashi, Masanori Hariyama, Mitsugi Shimoda, Keiichi Kubota
Proc.International Conference on Image Processing, Computer Vision, and Pattern Recognition(IPCV)   315-318   2015年7月   [査読有り]
Automatic Estimation of Optimal Resected Liver Regions Considering Practical Surgical Conditions
Masanori Hariyama, Takeaki Suzuki, Keisuke Maeda, Mitsugi Shimoda, Keiichi Kubota
Proc.International Conference on Image Processing, Computer Vision, and Pattern Recognition(IPCV)   356-360   2015年7月   [査読有り]
Evaluation of an FPGA-Based Shortest-Path-Search Accelerator
Yasuhiro Takei, Masanori Hariyama, Michitaka Kameyama
International Conference on Parallel and Distributed Processing Techniques and Applications(PDPTA)   613-617   2015年7月   [査読有り]
FPGA-Oriented Design of an FDTD Accelerator Based on Overlapped Tiling
Yasuhiro Takei, Hasitha Muthumala Waidyasooriya, Masanori Hariyama, Michitaka Kameyama
International Conference on Parallel and Distributed Processing Techniques and Applications(PDPTA)   72-77   2015年7月   [査読有り]
OpenCL-based Design of an FPGA Accelerator for Phase-Based Correspondence Matching
Shunsuke Tatsumi, Masanori Hariyama, Mamoru Miura, Koichi Ito, Takafumi Aoki
Proc. International Conference on Parallel and Distributed Processing Techniques and Applications(PDPTA)   613-617   2015年7月   [査読有り]
Zhengfan Xia, Masanori Hariyama, and Michitaka Kameyama
IEEE Transaction on VLSI Systems   23(4) 619-630   2015年   [査読有り]
Hasitha Muthumala Waidyasooriya, Masanori Hariyama, Yasuhiro Takei, and Michitaka Kameyama
Journal of Computational Engineering   2014    2014年12月   [査読有り]
Hasitha Muthumala Waidyasooriya, Daisuke Ono, Masanori Hariyama and Michitaka Kameyama
IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)   639-642   2014年11月   [査読有り]
An SIMD Architecture for Shortest-Path Search and Its FPGA Implementation
Yasuhiro Takei, Masanori Hariyama, Michitaka Kameyama
International Conference on Parallel and Distributed Processing Techniques and Applications(PDPTA)   53-56   2014年7月   [査読有り]
Liver Extraction from CT Images Based on Liver Structure Models
Masanori Hariyama, Riichi Tanizawa, Mitsugi Shimoda, Keiichi Kubota, Yasuhiro Kobayashi
International Conference on Image Processing, Computer Vision, and Pattern Recognition(IPCV)   170-173   2014年7月   [査読有り]
Design of an FPGA-Based FDTD Accelerator Using OpenCL
Yasuhiro Takei, Hasitha Muthumala Waidyasooriya, Masanori Hariyama,Michitaka Kameyama
International Conference on Parallel and Distributed Processing Techniques and Applications(PDPTA)   371-375   2014年7月   [査読有り]
Estimation of Resected Liver Regions Using a Tumor Domination Ratio
Masanori Hariyama, Moe Okada, Mitsugi Shimoda, Keiichi Kubota
International Conference on Image Processing, Computer Vision, and Pattern Recognition(IPCV)   52-56   2014年7月   [査読有り]
An Asynchronous High-Performance FPGA Based on LEDR/Four-Phase-Dual-Rail Hybrid Architecture
Yoshiya Komatsu, Masanori Hariyama and Michitaka Kameyama
Proc. the 5th International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies (HEART)   111-114   2014年6月   [査読有り]
FPGA-Accelerator for DNA Sequence Alignment Based on an Efficient Data-Dependent Memory Access Scheme
Hasitha Waidyasooriya, Masanori Hariyama and Michitaka Kameyama
Proc. the 5th International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies(HEART)   127-130   2014年6月   [査読有り]
Hasitha Muthumala Waidyasooriya, Masanori Hariyama, Yasuhiro Takei, and Michitaka Kameyama,
Journal of Computational Engineering   2014    2014年   [査読有り]
Yasuhiro Takei, Hasitha Muthumala WAIDYASOORIYA, Masanori Hariyama, Michitaka Kameyama
IEICE Transaction on Fundamentals   E96-A(12) 2576-2586   2013年12月   [査読有り]
Yoshiya Komatsu, Masanori Hariyama, Michitaka Kameyama
IEICE Transaction on Information and Systems   E96-D(8) 1632-1644   2013年8月   [査読有り]
Hasitha Muthumala Waidyasooriya, Masanori Hariyama and Michitaka Kameyama
International Conference of the IEEE Engineering in Medicine and Biology Society (EMBS)   651-654   2013年7月   [査読有り]
Heterogeneous Multicore Platform with Accelerator Templates and Its Implementation on an FPGA with Hard-core CPUs
Yasuhiro Takei, Hasitha Muthumala Waidyasooriya, Masanori Hariyama and Michitaka Kameyama
Proc. International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA)   47-50   2013年7月   [査読有り]
Reducing Floating-Point Error Based on Residue-Preservation and Its Evaluation on an FPGA
Hasitha Muthumala Waidyasooriya, Hirokazu Takahashi, Yasuhiro Takei, Masanori Hariyama and Michitaka Kameyama
Proc. International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA)   55-58   2013年7月   [査読有り]
An Area-Efficient Asynchronous FPGA Architecture for Handshake-Component-Based Design
Yoshiya KOMATSU, Masanori HARIYAMA and Michitaka KAMEYAMA
Proc. International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA),   15-18   2013年7月   [査読有り]
Flexible Ferroelectric-Capacitor Element for Low Power and Compact Logic-in-Memory Architectures
SHOTA ISHIHARA, NORIAKI IDOBATA, MASANORI HARIYAMA, MICHITAKA KAMEYAMA
Journal of Multiple-Valued Logic and Soft Computing   20(5-6) 595-623   2013年   [査読有り]
Masanori HARIYAMA, Hasitha Muthumala WAIDYASOORIYA, Yasuhiro TAKEI, and Michitaka KAMEYAMA
Interdisciplinary Information Sciences   18(2) 175-184   2012年12月   [査読有り]
Yoshitaka HIRAMATSU, Hasitha Muthumala WAIDYASOORIYA, Masanori HARIYAMA, Toru NOJIRI, Kunio UCHIYAMA, and Michitaka KAMEYAMA
IEICE Transaction on Electron   E95-C(12) 1872-1882   2012年12月   [査読有り]
Xia Zhengfan, Shota Ishihara, Masanori Hariyama, Michitaka Kameyama
IEICE Transaction on Electron   E96-C(8) 1434-1443   2012年8月   [査読有り]
Architecture of an Asynchronous FPGA for Handshake-Component-Based Design
Yoshiya Komatsu, Masanori Hariyama, and Michitaka Kameyama
The International Conference on Engineering of Reconfigurable Systems and Algorithms(ERSA)   133-136   2012年7月   [査読有り]
Area-Efficient Design of Asynchronous Circuits Based on Balsa Framework for Synchronous FPGAs
Yoshiya Komatsu, Masanori Hariyama, and Michitaka Kameyama
The International Conference on Engineering of Reconfigurable Systems and Algorithms(ERSA)   113-118   2012年7月   [査読有り]
Low-Power Heterogeneous Platform for High Performance Computing and Its Application to 2D-FDTD Computation
Hasitha Muthumala Waidyasooriya, Yasuhiro Takei, Masanori Hariyama and Michitaka Kameyama
The International Conference on Engineering of Reconfigurable Systems and Algorithms(ERSA)   147-150   2012年7月   [査読有り]
Hybrid Single/Double Precision Floating-Point Computation on GPU Accelerators for 2-D FDTD
Hasitha Muthumala Waidyasooriya, Yasuhiro Takei, Masanori Hariyama and Michitaka Kameyama
International Conference on Parallel and Distributed Processing Techniques and Applications (PDPTA)   1001-1002   2012年7月   [査読有り]
An Asynchronous FPGA Based on Dual/Single-Rail Hybrid Architecture
Zhengfan XIA, Shota ISHIHARA, Masanori HARIYAMA, and Michitaka KAMEYAMA
The International Conference on Engineering of Reconfigurable Systems and Algorithms(ERSA)   139-142   2012年7月   [査読有り]
Hasitha Muthumala Waidyasooriya, Yasuhiro Takei, Masanori Hariyama, Michitaka Kameyama
IEEE International Symposium on Circuits and Systems(ISCAS)   1339-1342   2012年5月   [査読有り]
Zhengfan Xia, Shota Ishihara, Masanori Hariyama, and Michitaka Kameyama
Zhengfan Xia, Shota Ishihara, Masanori Hariyama, and Michitaka Kameyama
IEEE International Symposium on Circuits and Systems(ISCAS)   3017-3020   2012年5月   [査読有り]
Hasitha Muthumala Waidyasooriya, Yosuke Ohbayashi, Masanori Hariyama, Michitaka Kameyama
IEICE Trans. Inf. and Syst.   E95-D(2) 354-363   2012年2月   [査読有り]
Shota ISHIHARA Ryoto TSUCHIYA Yoshiya KOMATSU Masanori HARIYAMA Michitaka KAMEYAMA
IEICE Transaction on Electron   E94-C(10) 1669-1679   2011年10月   [査読有り]
Hasitha Muthumala Waidyasooriya, Yosuke Ohbayashi, Masanori Hariyama, Michitaka Kameyama
IEEE Transactions on Circuits and Systems for Video Technology   21(10) 1453-1466   2011年10月   [査読有り]
Shota Ishihara, Masanori Hariyama, Michitaka Kameyama
IEEE Transactions on Very Large Scale Integration Systems(TVLSI)   19(8) 1394-1406   2011年8月   [査読有り]
An FPGA Based on Synchronous/Asynchroous Hybrid Architecture with Area-Efficient FIFO Interfaces
Masanori Hariyama, Yoshiya Komatsu, Shota Ishihara, Ryoto Tsuchiya, and Michitaka Kameyama
Proc. International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA)   331-334   2011年7月   [査読有り]
Data-Transfer-Aware Memory Allocation for Dynamically Reconfigurable Accelerators in Heterogeneous Multicore Processors
Yosuke Ohbayashi, Hasitha Muthumala Waidyasooriya, Masanori Hariyama, Michitaka Kameyama
Proc. International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA)   282-288   2011年7月   [査読有り]
A Switch Block for Multi-Context FPGAs Based on Floating-Gate-MOS Functional Pass-Gates Using Multiple/Binary Valued Hybrid Signals
Shota Ishihara, Noriaki Idobata, Yoshihiro Nakatani, Masanori Hariyama and Michitaka Kameyama
Journal of Multiple-Valued Logic and Soft Computing   17(5-7) 553-580   2011年6月   [査読有り]
Yoshiya Komatsu, Shota Ishihara, Masanori Hariyama, Michitaka Kameyama
Proceedings of The Asia and South Pacific Design Automation Conference (ASP-DAC)   89-90   2011年1月   [査読有り]
Hasitha Muthumala Waidyasooriya, Masanori Hariyama, Michitaka Kameyama
IEICE transaction on Fundamentals   E94-A(1) 342-351   2011年1月   [査読有り]
Hasitha Muthumala Waidyasooriya, Masanori Hariyama, Michitaka Kameyama
IEICE Transaction on Fundamentals   E93-A(12) 2570-2580   2010年12月   [査読有り]
Implementation of a Low-Power FPGA Based on Self-Adaptive Voltage Control
Shota Ishihara, Zhengfan Xia, Masanori Hariyama, Michitaka Kameyama
Student Organizing International Mini-Conference on Information Electronics Systems   57-58   2010年10月
Evaluation of a Self-Adaptive Voltage Control Scheme for Low-Power FPGAs
Shota Ishihara, Zhengfan Xia, Masanori Hariyama, Michitaka Kameyama
Journal of Semiconductor Technology and Science (JSTS)   10(3) 165-175   2010年10月   [査読有り]
Accelerator-Centric Mapping Methodologies for Heterogeneous Multicore Processors
Hasitha Muthumala Waidyasooriya, Masanori Hariyama, and Michitaka Kameyama
Integrated Circuits and Devices in Vietnam(ICDV)   49-54   2010年8月   [招待有り]
Z. Xia, S. Ishihara, M. Hariyama, M. Kameyama
Electronics Letters   46(16) 1116-1117   2010年8月   [査読有り]
Architecture of an FPGA-Oriented Heterogeneous Multi-core Processor with SIMD-Accelerator Cores
Hasitha Muthumala Waidyasooriya, Masanori Hariyama, Michitaka Kameyama
Proc. International Conference on Engineering of Reconfigurable Systems and Algorithms(ERSA)   179-186   2010年7月   [査読有り]
Mapping for a Heterogeneous Multi-Core Media Processor Considering the Data Transfer Time
Hasitha Muthumala Waidyasooriya, Daisuke Okumura, Masanori Hariyama, Michitaka Kameyama
Proc. International Conference on Engineering of Reconfigurable Systems and Algorithms(ERSA)   281-282   2010年7月   [査読有り]
A Field-Programmable VLSI Based on Synchronous/Asynchronous Hybrid Architecture
Masanori Hariyama, Ryoto Tsuchiya, Shota Ishihara, Michitaka Kameyama
Proc. International Conference on Engineering of Reconfigurable Systems and Algorithms(ERSA)   271-274   2010年7月   [査読有り]
Shota Ishihara, Zhengfan Xia, Masanori Hariyama, and Michitaka Kameyama
Proc. International SoC Design Conference (ISOCC)      2009年11月   [査読有り]
Acceleration of Optical-Flow Extraction Using Dynamically Reconfigurable ALU Arrays
Hasitha Muthumala Waidyasooriya, Masanori Hariyama and Michitaka Kameyama
International Conference on Engineering of Reconfigurable Systems and Algorithms(ERSA)   291-294   2009年7月   [査読有り]
A Fine-Grain SIMD Architecture Based on Flexible Ferroelectric-Capacitor Logic
Shota Ishihara, Noriaki Idobata, Masanori Hariyama, Michitaka Kameyama
International Conference on Engineering of Reconfigurable Systems and Algorithms(ERSA)   271-274   2009年7月   [査読有り]
FPGA Implementation of a High-Speed Stereo Matching Processor Based on Recursive Computation
Masanori Hariyama, Keita Tanji, and Michitaka Kameyama
International Conference on Engineering of Reconfigurable Systems and Algorithms(ERSA)   263-266   2009年7月   [査読有り]
An Asynchronous Field-Programmable VLSI Using LEDR/4-Phase-Dual-Rail Protocol Converters
Shota Ishihara, Yoshiya Komatsu, Masanori Hariyama, Michitaka Kameyama
International Conference on Engineering of Reconfigurable Systems and Algorithms(ERSA)   145-150   2009年7月   [査読有り]
Hasitha Muthumala WAIDYASOORIYA, Masanori HARIYAMA and Michitaka KAMEYAMA
IEICE Transaction on Electron.   E92-C(4)    2009年4月   [査読有り]
Yasuhiro Kobayashi, Masanori Hariyama, Michitaka Kameyamaa
IEEE Transaction on VLSI Systems   17(3) 403-416   2009年3月   [査読有り]
Shota Ishihara, Masanori Hariyama, and Michitaka Kameyama
Asia and South Pacific Design Automation Conference (ASP-DAC)   119-120   2009年1月   [査読有り]
Hasitha Muthumala WAIDYASOORIYA, Masanori HARIYAMA and Michitaka KAMEYAMA
IEICE Transaction on Fundamentals   E91-A(12) 3596-3606   2008年12月   [査読有り]
Yasuhiro Kobayashi, Masanori Hariyama, Michitaka Kameyama
IEICE Transaction on Information and Systems   E91-D(10) 2386-2397   2008年10月   [査読有り]
Masanori Hariyama, Shota Ishihara, Michitaka Kameyama
IEICE Transactions on Electronics   E91-C(9) 1416-1426   2008年9月   [査読有り]
Non-volatile Multi-Context FPGAs Using Hybrid Multiple-Valued/Binary Context Switching Signals
Masanori Hariyama, Shota Ishihara, Noriaki Idobata, Michitaka Kameyama
International Conference on Reconfigurable Systems and Algorithms(ERSA)   309-310   2008年7月   [査読有り]
Implementation of a Multi-Context FPGA Based on Flexible-Context-Partitioning
Waidyasooriya Hasitha Muthumala, Masanori Hariyama, Michitaka Kameyama
International Conference on Reconfigurable Systems and Algorithms(ERSA)   201-207   2008年7月   [査読有り]
FPGA Implementation of a Vehicle DetectionAlgorithm Using Three-Dimensional Information
Reconfigurable Architectures Workshop      2008年4月   [査読有り]
Design of a Trinocular-Stereo-Vision VLSI Processor Based on Optimal Scheduling
Masanori HARIYAMA, Naoto YOKOYAMA, Michitaka KAMEYAMA
IEICE Trans. Electron.   E91-C(4) 479-486   2008年4月   [査読有り]
Hasitha Muthumala Waidyasooriya, Chong Wei Sheng, Masanori Hariyama, Michitaka Kameyama
IEICE Trans. Electron.   E91-C(4) 517-525   2008年4月   [査読有り]
Waidyasooriya Hasitha Muthumala, Masanori Hariyama, Michitaka Kameyama
IEEE Dallas circuits and systems   59(62)    2007年11月   [査読有り]
Masanori Hariyama, Shota Ishihara, Chang Chia Wei and Michitaka Kameyama
IEEE Asian Solid-State Circuits Conference(A-SSCC)   380-383   2007年11月   [査読有り]
ウィンドウ演算のための最適スケジューリング・メモリアロケーション
小林康浩,張山昌論, 亀山充隆
電子情報通信学会論文誌   J90-D(5) 1178-1193   2007年5月   [査読有り]
Masanori Hariyama and Michitaka Kameyama
IEEE Asia Pacific Conference on Circuits and Systems(APCCAS)   1805-1808   2006年12月   [査読有り]
Waidyasooriya Hasitha Muthumala, Masanori Hariyama, Michitaka Kameyama
IEEE Asia Pacific Conference on Circuits and Systems(APCCAS)   1266-1269   2006年12月   [査読有り]
Masanori Hariyama, Waidyasooriya Hasitha Muthumala, Michitaka Kameyama
Asian Solid-State Circuits Conference (A-SSCC)   155-158   2006年11月   [査読有り]
Masanori Hariyama, Naoto Yokoyama and Michitaka Kameyama
Asian Solid-State Circuits Conference (A-SSCC)   123-126   2006年11月   [査読有り]
Masanori HARIYAMA, Shigeo YAMADERA, Michitaka KAMEYAMA
IEICE Trans. Electron.   E89-C(11) 1551-1558   2006年11月   [査読有り]
Masanori HARIYAMA, Shigeo YAMADERA, Michitaka KAMEYAMA
IEICE Trans. Electron.   E89-C(11) 1655-1661   2006年11月   [査読有り]
Processor Architecture for Road Extraction Based on Projective Transformation
Sunggae Lee, Masanori Hariyama, Michitaka Kameyama
SICE-ICCAS 2006   1446-1450   2006年10月   [査読有り]
Yoshihiro NAKATANI, Masanori HARIYAMA and Michitaka KAMEYAMA
International Symposium on Multiple-Valued Logic(ISMVL)      2006年5月   [査読有り]
Fine-Grained Architectures for Field-Programmable VLSIs
Masanori Hariyama, Michitaka Kameyama
International Workshop on Post-Binary ULSI Systems   1-5   2006年5月   [招待有り]
Yoshihiro NAKATANI, Masanori HARIYAMA and Michitaka KAMEYAMA
Reconfigurable Architectures Workshop(RAW)      2006年4月   [査読有り]
Masanori Hariyama, Michitaka Kameyama, Yasuhiro Kobayashi
IEEE Computer Society Anual Symposium on VLSI   193-198   2006年3月   [査読有り]
Masanori Hariyama, Yasuhiro Kobayashi, Haruka Sasaki, Michitaka Kameyama
IEICE Trans. Fundamentals   E88-A(12) 3516-3522   2005年12月   [査読有り]
Weisheng Chong,Masanori Hariyama, Michitaka Kameyama
IEICE Trans. Fundamentals   E88-A(12) 3298-3305   2005年12月   [査読有り]
Masanori Hariyama, Sho Ogata, Michitaka Kameyama, Yasutoshi Morita
IEEE Asian Solid-State Circuits Conference   421-424   2005年11月   [査読有り]
Masanori Hariyama, Haruka Sasaki, and Michitaka Kameyama
IEICE Trans. Inf. & Syst.   E88-D(7) 1486-1491   2005年7月   [査読有り]

Misc

 
亀山充隆, 張山昌論
映像情報メディア学会誌   63(9) 1182-1184   2009年9月

書籍等出版物

 
Design of FPGA-Based Computing Systems with OpenCL
Hasitha Muthumala Waidyasooriya, Masanori Hariyama and Kunio Uchiyama
2017年11月   ISBN:97833196816
FPGAの原理と構成
張山昌論 (担当:共著, 範囲:255頁〜272頁)
オーム社   2016年3月   
Emerging Trends in Image Processing, Computer Vision, and Pattern Recognition
Masanori Hariyama, Mitsugi Shimoda (担当:共著, 範囲:Chapter 23(Automatic estimation of a resected liver region using a tumor domination ratio))
Morgan Kaufmann Publishers   2015年1月   ISBN:978-0-12-802015-6
Towards Green ICT
M.Kameyama, M.Hariyama (担当:共著, 範囲:Chapter 17, pp.265-274, "Interconnect-Aware High-Level Design Methodologies for Low-Power VLSIs")
River Publishers Series in Communications   2010年7月   
映像情報メディア工学大事典
張山昌論
オーム社   2010年6月   ISBN:978-4-274-20869-0

講演・口頭発表等

 
FPGAを用いたヘテロジニアスマルチコアプロセッサのプラットフォーム開発
電子情報通信学会集積回路研究会主催 第2回アクセラレーション技術発表討論会   2010年9月10日   
リアルワールド知能システムとヘテロジニアスマルチコアアーキテクチャの展望
第8回 SuperH フォーラム   2009年9月4日   

競争的資金等の研究課題

 
ロボットエレクトロニクスシステム
研究期間: 1993年8月   
高安全知能集積システム
研究期間: 1993年8月   
リコンフィギャラブルアーキテクチャとその応用
その他の研究制度
研究期間: 2000年4月