Papers

Peer-reviewed
Mar 20, 2013

Optical configuration acceleration on a new optically reconfigurable gate array VLSI using a negative logic implementation

Applied Optics
  • Retsu Moriwaki
  • ,
  • Minoru Watanabe

Volume
52
Number
9
First page
1939
Last page
1946
Language
English
Publishing type
Research paper (scientific journal)
DOI
10.1364/AO.52.001939
Publisher
OSA - The Optical Society

This paper presents a proposal of an optical configuration acceleration method applied to optically reconfigurable gate arrays (ORGAs) using a negative logic implementation. The gate array of an ORGA is reconfigured using a holographic memory. The reading time of a holographic memory depends on the number of bright bits included in a configuration context. The proposed optical configuration acceleration method can decrease the number of bright bits. As a result, the proposed optical configuration acceleration method can increase the reconfiguration frequency. In this paper, a fabricated ORGA very large scale integration that can support the optical configuration acceleration method is estimated. Consequently, this paper shows that the reconfiguration frequency of the proposed method is 1.97 times higher than those of conventional ORGA architectures with no increase of laser power. © 2013 Optical Society of America.

Link information
DOI
https://doi.org/10.1364/AO.52.001939
URL
https://www.osapublishing.org/ao/abstract.cfm?uri=ao-52-9-1939
ID information
  • DOI : 10.1364/AO.52.001939
  • ISSN : 1539-4522
  • ISSN : 1559-128X
  • SCOPUS ID : 84875682766

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