Papers

Peer-reviewed
Dec, 2015

Sustainable advantage of a parallel configuration in an optical FPGA

2015 IEEE/SICE INTERNATIONAL SYMPOSIUM ON SYSTEM INTEGRATION (SII)
  • Minoru Watanabe

First page
807
Last page
810
Language
English
Publishing type
Research paper (international conference proceedings)
DOI
10.1109/SII.2015.7405083
Publisher
IEEE

Recently, static random access memory (SRAM)based field programmable gate arrays (FPGAs) are used for various systems. Since such SRAM-based FPGAs are programmable, their use over a long period must accommodate the use of a partly damaged programmable gate array. However, since current FPGAs use a serial configuration line for their configuration and the serial configuration circuit is invariably first broken circuit. Therefore, currently available FPGAs cannot accommodate the use of a partly damaged programmable gate array. However, if a partly damaged programmable gate array could be used, then the lifetime of VLSIs would be increased drastically. To extend the lifetime of programmable devices, FPGA should use a parallel configuration architecture instead of the serial configuration architecture of currently available FPGAs. This paper therefore clarifies the benefits of the parallel configuration architecture on an optically reconfigurable gate array (ORGA) VLSI using the designs of an ORGA-VLSI and a currently available serial-configuration FPGA.

Link information
DOI
https://doi.org/10.1109/SII.2015.7405083
Web of Science
https://gateway.webofknowledge.com/gateway/Gateway.cgi?GWVersion=2&SrcAuth=JSTA_CEL&SrcApp=J_Gate_JST&DestLinkType=FullRecord&KeyUT=WOS:000382556600136&DestApp=WOS_CPL
URL
https://ieeexplore.ieee.org/document/7405083
ID information
  • DOI : 10.1109/SII.2015.7405083
  • Web of Science ID : WOS:000382556600136

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