Dec, 2010
Background light effect of a dynamically reconfigurable vision-chip architecture
2010 IEEE/SICE International Symposium on System Integration: SI International 2010 - The 3rd Symposium on System Integration, SII 2010, Proceedings
- ,
- First page
- 426
- Last page
- 430
- Language
- English
- Publishing type
- Research paper (international conference proceedings)
- DOI
- 10.1109/SII.2010.5708363
- Publisher
- IEEE
Recently, demands for implementation of a high-speed image recognition function onto autonomous vehicles and robots, that is superior to that of the human eye, have been increasing. To date, analog-type vision chips and digital vision chips have been developed. Nevertheless, even now, realizing such high-speed real-time image recognition operation is extremely difficult because the template information transfer rate and template matching operation cycle reach the order of Petapixel/s. Therefore, to accommodate template matching operations that can be executed at rates greater than Petapixel/s, a dynamically reconfigurable vision-chip architecture has been developed in which a holographic memory technique is introduced to current VLSI technology. However, the dynamically reconfigurable vision-chip architecture must receive image information in addition to configuration context information. At such a time, a salient concern is that image information light might reduce the retention time of photodiode memories on a dynamically reconfigurable vision-chip. This paper therefore clarifies that the background light does not affect the photodiode memories on a dynamically reconfigurable vision-chip architecture. ©2010 IEEE.
- Link information
- ID information
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- DOI : 10.1109/SII.2010.5708363
- SCOPUS ID : 79952805587