Papers

Peer-reviewed
2008

Programmable Optically Reconfigurable Gate Array Architecture using a PAL-SLM

2008 IEEE/SICE INTERNATIONAL SYMPOSIUM ON SYSTEM INTEGRATION
  • Shinya Kubota
  • ,
  • Minoru Watanabe

First page
100
Last page
104
Language
English
Publishing type
Research paper (international conference proceedings)
DOI
10.1109/SI.2008.4770434
Publisher
IEEE

Recently, optically reconfigurable gate arrays (ORGAs) consisting of a gate array VLSI, a holographic memory, and a laser array have been developed to achieve huge virtual gate counts that is much larger than those of currently available VLSIs. Using ORGA architecture, greater than 1 tera gate count VLSIs are possible by exploiting the storage capacity of a holographic memory. Conventional ORGAs have only one shortcoming compared with current field programmable gate arrays (FPGAs) : they are not reprogrammable after their fabrication because, to reprogram ORGAs, a holographic memory must be disassembled from its ORGA package, reprogrammed outside of the ORGA package using a holographic memory writer, and implemented into the ORGA package with high precision beyond that available by manual assembly. To improve that shortcoming, this paper presents the world's first programmable ORGA architecture and experimental results. Furthermore, in light of those experimental results, this paper presents discussion of the availability of this architecture and future plans.

Link information
DOI
https://doi.org/10.1109/SI.2008.4770434
Web of Science
https://gateway.webofknowledge.com/gateway/Gateway.cgi?GWVersion=2&SrcAuth=JSTA_CEL&SrcApp=J_Gate_JST&DestLinkType=FullRecord&KeyUT=WOS:000272028300018&DestApp=WOS_CPL
ID information
  • DOI : 10.1109/SI.2008.4770434
  • Web of Science ID : WOS:000272028300018

Export
BibTeX RIS