2006年
Reconfiguration speed adjustment technique for ORGAs with a holographic memory
2006 INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE LOGIC AND APPLICATIONS, PROCEEDINGS
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- 開始ページ
- 917
- 終了ページ
- 922
- 記述言語
- 英語
- 掲載種別
- 研究論文(国際会議プロシーディングス)
- DOI
- 10.1109/FPL.2006.311344
- 出版者・発行元
- IEEE
Optically reconfigurable gate arrays (ORGAs), which consist of a gate array VLSI, a holographic memory, and a laser diode array, are a type of programmable gate array. The gate array of ORGAs is optically reconfigured using diffraction patterns from a holographic memory that is addressed by a laser diode array. In previously proposed ORGAs, the optical reconfiguration speed has been designed to be constant by assuming a worst-case reconfiguration speed. However, the diffraction efficiency of a holographic memory varies depending on the pattern of reconfiguration contexts that is recorded in it. Therefore, this paper proposes a reconfiguration speed adjustment technique for ORGAs to accelerate the reconfiguration speed. In addition, the advantages are discussed from some simulation results of a holographic memory and the experimental results of a fabricated gate array VLSI.
- リンク情報
- ID情報
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- DOI : 10.1109/FPL.2006.311344
- ISSN : 1946-1488
- Web of Science ID : WOS:000245038300159