TSUKIYAMA Shuji

J-GLOBAL         Last updated: Jun 4, 2019 at 02:49
 
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Name
TSUKIYAMA Shuji
E-mail
tsukielect.chuo-u.ac.jp
URL
http://www.elect.chuo-u.ac.jp/tsuki/index.html
Affiliation
Chuo University
Section
Faculty of Science and Engineering
Job title
Professor
Degree
Ph. D.(Osaka University)
Research funding number
90142314

Research Areas

 
 

Academic & Professional Experience

 
Apr 1977
 - 
Jan 1987
Assistant Professor, Department of Electronic Engineering, Facutly of Engineering, Osaka University
 
Oct 1978
 - 
Mar 1980
Visiting Assistant Research Engineer, Electronics Research Labs., Univ. of California, Berkeley
 
Jan 1987
 - 
Mar 1987
Associate Professor, Faculty of Engineering, Osaka University
 
Apr 1987
 - 
Mar 1990
Associate Professor, Faculty of Science and Engineering, Chuo University
 
Apr 1990
   
 
Professor, Faculty of Science and Engineering, Chuo University
 

Education

 
Apr 1974
 - 
Mar 1977
Graduate School, Division of Engineering, Osaka University
 
Apr 1972
 - 
Mar 1974
電子工学専攻, Graduate School, Division of Engineering, Osaka University
 
Apr 1968
 - 
Mar 1972
Department of Electronic Engineering, Faculty of Engineering, Osaka University
 

Awards & Honors

 
Mar 2015
New nMOS dynamic shift registers for driver circuit of small LSDs and their evaluations, SASIMI 2015 Outstanding Paper Award, SASIMI 2015 TPC
Winner: Shinji Higa, Shuji Tsukiyama, Isao Shirakawa
 

Published Papers

 
A new algorithm to determine covariance in statistical maximum for Gaussian mixture model
Daiki Azuma, Shuji Tsukiyama
IEICE Trans. on Fundamentals   E100-A(12) 2834-2841   Dec 2017   [Refereed]
A new algorithm for reducing components of a Gaussian mixture model
Naoya Yokoyama, Daiki Azuma, Shuji Tsukiyama, Masahiro Fukui
IEICE Trans. Fundametals   E99-A(12) 2425-2434   Dec 2016   [Refereed]
A new delay distribution model with a half triangular distribution for statistical static timing analysis
Shuji Tsukiyama, Masahiro Fukui
IEICE Trans. Fundamentals   E96-A(12) 2542-2552   Dec 2013   [Refereed]
A statistical maximum algorithm for Gaussian mixture models considering the cumulative function curve
Shuji Tsukiyama and Masahiro Fukui
IEICE Trans. Fundamentals   E94-A(12) 2528-2536   Dec 2011   [Refereed]
A new statistical timing analysis using Gaussian mixture models for delay and slew propagated together
Shingo Takahashi, Shuji Tsukiyama
IEICE Trans. Fundamentals   E92-A(3) 900-911   Mar 2009   [Refereed]

Misc

 
VLSIの最適レイアウト
築山修治,白川功
計測と制御   25(3) 229-235   Mar 1986
組合せ問題の計算複雑度
築山修治
計測と制御   21(8) 23-31   Aug 1982
Lower bounds to the area required to draw a rectangular dual
Katsunori Tani, Shuji Tsukiyama, Shoji Shinoda, Isao Shirakawa
Abstracts 13th Int. Symp. Math. Prog.   338   Aug 1988

Books etc

 
Introduction to Digital Circuit Design
Shuji Tsukiyama, Takashi Kambe, Masahiro Fukui (Part:Joint Work, 2章,3章,6章,付録,演習問題,まえがき,スライドショウ)
Corona Publishing Co., Ltd.   Apr 2010   ISBN:978-4-330-00811-1
Design of Algorithms and Data Structures
Shuji Tsukiyama
Corona Publishing Co., Ltd.   Mar 2003   ISBN:4-339-02396-5
VLSI 物理設計(アルゴリズム 工学,6章 6.14 節)
築山修治
共立出版   Jun 2001   
VLSIレイアウト設計における最適化問題(離散構造とアルゴリズム II, 第5章)
築山修治
近代科学社   Jun 1993   
セル設計(ディジタル信号処理ハンドブック,3 編 6 章 4 節)および レイアウト(同 5 節)
築山修治
オーム社   Apr 1992   

Conference Activities & Talks

 
C-Based Timing Driven Design –- C-Based Timing Driven High-Level Design System for System LSI
Takashi Kambe, Shuji Tsukiyama
Design, Automation & Test in Europe (DATE2012), UB01 University Booth Session 1   Mar 2012   
Statistical static timing analysis - What we have ever seen -
Shuji Tsukiayma
Proc. Japan Conf. on Computational Geometry and Graphs (JCCGG2009)   Nov 2009   
Selection of Gaussian mixture reduction methods using machine learning
Haruki Kazama, Shuji Tsukiyama
IEICE VLSI Design Technical Committee Conf.   28 Feb 2019   Engineering Science Society, IEICE
電気2重層キャパシタの回路モデルパラメータの一同定法
上坂直輝,築山修治,能登健一,奥村卓司
電子情報通信学会,VLSI 設計技術研究会   28 Feb 2019   電子情報通信学会
電気2重層キャパシタの3並列キャパシタンスを用いた回路モデル
上坂直輝,築山修治,能登健一,奥村卓司
2018年電気化学会第85回大会   Mar 2018   

Research Grants & Projects

 
Statistical method for finding an optimal structure of battery pack considering degradation variability
Grants-in-Aid for Scientific Research
Project Year: Apr 2015 - Mar 2017
Chip level timing analysis of 10 billion transistors scale
Grants-in-Aid for Scientific Research
Project Year: Apr 2011 - Mar 2014    Investigator(s): 福井正博
 集積回路の微細化技術の進展に伴い,①回路が100億トランジスタを搭載し,大規模化・複雑化すると共に,②物理変動によるタイミング動作の信頼性保証が大幅に困難化している.|rn| 本研究課題は,次世代のギガスケールの集積回路に対して,製造ばらつき,電源電圧,熱変動,トランジスタの経年劣化を考慮し,チップレベルでのタイミング解析を高速に行う技術の確立を目的とする.すなわち,本研究は微細化物理による変動要素や製造ばらつきによる統計的要素を踏まえつつ,大規模の集積回路がタイミングエラーを起こさず高...
A study on establishing a statistical design methodology for digital circuits using statistical timing analysis
Grants-in-Aid for Scientific Research
Project Year: Apr 2009 - Mar 2012    Investigator(s): 築山 修治
A study on establishing a variability-aware design methodology and a next generation algorithm for statistical timing analysis
Grants-in-Aid for Scientific Research
Project Year: Apr 2007 - Mar 2009    Investigator(s): 築山 修治
新しいパラダイムとしてのアルゴリズム工学:計算困難問題への挑戦
文部科学省: 科学研究費補助金(特定領域研究B)
Project Year: Apr 1999 - Mar 2002

Patents

 
特許第6365938号 : 設計装置、設計方法およびプログラム

Social Contribution

 
Aisia and South Pacific Design Automation Conf.
[]  Mar 1994 - Feb 1998
Aisia and South Pacific Design Automation Conf.
[]  Mar 1994 - Feb 1998
Aisia and South Pacific Design Automation Conf.
[]  Mar 1994 - Feb 1998
Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI)
[]  Oct 1989
Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI)
[]  Oct 1989