2014年9月
An area-efficient 12-bit 1.25MS/s radix-value self-estimated non-binary ADC with relaxed requirements on analog components
Proceedings of the IEEE 2014 Custom Integrated Circuits Conference
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- 記述言語
- 掲載種別
- 研究論文（国際会議プロシーディングス）
- DOI
- 10.1109/cicc.2014.6946123
- 出版者・発行元
- IEEE
- リンク情報
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- DOI
- https://doi.org/10.1109/cicc.2014.6946123
- DBLP
- https://dblp.uni-trier.de/rec/conf/cicc/SanSHMA14
- Web of Science
- https://gateway.webofknowledge.com/gateway/Gateway.cgi?GWVersion=2&SrcAuth=JSTA_CEL&SrcApp=J_Gate_JST&DestLinkType=FullRecord&KeyUT=WOS:000349122300126&DestApp=WOS_CPL
- URL
- http://xplorestaging.ieee.org/ielx7/6924030/6945974/06946123.pdf?arnumber=6946123
- ID情報
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- DOI : 10.1109/cicc.2014.6946123
- DBLP ID : conf/cicc/SanSHMA14
- SCOPUS ID : 84928154799
- Web of Science ID : WOS:000349122300126