2006年3月
Fabrication of a vertical-channel double-gate metal-oxide-semiconductor field-effect transistor using a neutral beam etching
JAPANESE JOURNAL OF APPLIED PHYSICS PART 2-LETTERS & EXPRESS LETTERS
- ,
- ,
- ,
- ,
- ,
- ,
- ,
- ,
- ,
- ,
- ,
- ,
- ,
- 巻
- 45
- 号
- 8-11
- 開始ページ
- L279
- 終了ページ
- L281
- 記述言語
- 英語
- 掲載種別
- DOI
- 10.1143/JJAP.45.L279
- 出版者・発行元
- INST PURE APPLIED PHYSICS
A vertical ultrathin-channel (UTC) formation process using a low-energy neutral beam etching (NBE) for a double-gate (DG) metal-oxide-semiconductor field-effect transistor (MOSFET) is proposed for the first time. The NBE can perfectly eliminate the charge build-up and photon radiation damages from the plasma. By utilizing the NBE, fin-type vertical MOSFETs with damage-less smooth sidewalls were successfully fabricated. The fabricated FinFFTs realized higher electron mobility than that using a conventional reactive ion etching. The improved mobility is well explained by the atomically-flat surface utilizing by the NBE.
Web of Science ® 被引用回数 : 9
Web of Science ® の 関連論文(Related Records®)ビュー
- リンク情報
- ID情報
-
- DOI : 10.1143/JJAP.45.L279
- ISSN : 0021-4922
- Web of Science ID : WOS:000236562200022