昌原明植 (Meishoku Masahara) - マイポータル

基本情報

所属: 独立行政法人産業技術総合研究所エレクトロニクス研究部門先端シリコンデバイスグループ

J-GLOBAL ID: 200901044967811926
researchmap会員ID: 5000086759

外部リンク: http://www.aist.go.jp/RESEARCHERDB/cgi-bin/worker_detail.cgi?call=namae&rw_id=M87606217

MISC

Experimental study of effective carrier mobility of multi-fin-type double-gate metal-oxide-semiconductor field-effect transistors with (111) channel surface fabricated by orientation-dependent wet etching

YX Liu, E Sugimata, K Ishii, M Masahara, K Endo, T Matsukawa, H Yamauchi, S O'uchi, E Suzuki

JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS BRIEF COMMUNICATIONS & REVIEW PAPERS 45(4B) 3084-3087 2006年4月
Fabrication of a vertical-channel double-gate metal-oxide-semiconductor field-effect transistor using a neutral beam etching

K Endo, S Noda, M Masahara, T Kubota, T Ozaki, SJ Samukawa, YX Liu, K Ishii, Y Ishikawa, E Sugimata …

JAPANESE JOURNAL OF APPLIED PHYSICS PART 2-LETTERS & EXPRESS LETTERS 45(8-11) L279-L281 2006年3月
Fabrication and characterization of vertical-type double-gate metal-oxide-semiconductor field-effect transistor with ultrathin Si channel and self-aligned source and drain

M Masahara, YX Liu, K Endo, T Matsukawa, K Sakamoto, K Ishii, S O'uchi, E Sugimata, H Yamauchi, E Suzuki

APPLIED PHYSICS LETTERS 88(7) 0721031-0721033 2006年2月
Vertical ultrathin-channel multi-gate MOSFETs (MuGFETs):Technological challenges and future developments

IEEJ Transactions on Electrical and Electronics Engineering 2006年
縦型ダブルゲートMOSFETデバイス技術

昌原明植, 柳永〓, 遠藤和彦, 松川貴, 鈴木英一

電気学会誌 126(6) 702-707 2006年
Demonstration and analysis of accumulation-modeDG=MOSFET

JJAP 2006年
Doping integrity diagnostics of planar transistor channel structures by scanning nonlinear dielectric microscopy

T Matsukawa, M Masahara, H Tanoue, S Kanemaru, E Suzuki

JOURNAL OF VACUUM SCIENCE & TECHNOLOGY B 24(1) 237-244 2006年1月
A New Fabrication Technology of FinFETs using a Neutral Beam Etching

JAPANESE JOURNAL OF APPLIED PHYSICS 45(6B) 5513-5516 2006年
Investigation of N-Channel Triple-Gate MOSFETs on (100) SOI Substrate

JAPANESE JOURNAL OF APPLIED PHYSICS 45(4B) 3097-3100 2006年
Demonstration, analysis, and device design considerations for independent DG MOSFETs

M Masahara, YX Liu, K Sakamoto, K Endo, T Matsukawa, K Ishii, T Sekigawa, H Yamauchi, H Tanoue, S Kanemaru …

IEEE TRANSACTIONS ON ELECTRON DEVICES 52(9) 2046-2053 2005年9月
A novel process for fabrication of gated silicon field emitter array taking advantage of ion bombardment retarded etching

T Tanii, S Fujita, Y Numao, Matsuya, I, M Sakairi, M Masahara, T Ohdomari

JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS BRIEF COMMUNICATIONS & REVIEW PAPERS 44(7A) 5191-5192 2005年7月
Work function controllability of metal gates made by interdiffusing metal stacks with low and high work functions

T Matsukawa, YX Liu, A Masahara, K Ishii, K Endo, H Yamauchi, E Sugimata, H Takashima, T Higashino, E Suzuki …

MICROELECTRONIC ENGINEERING 80 284-287 2005年6月
Demonstration of dopant profiling in ultrathin channels of vertical-type double-gate metal-oxide-semiconductor field-effect-transistor by scanning nonlinear dielectric microscopy

M Masahara, S Hosokawa, T Matsukawa, K Endo, Y Naitou, H Tanoue, E Suzuki

JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS BRIEF COMMUNICATIONS & REVIEW PAPERS 44(4B) 2400-2404 2005年4月
Work function uniformity of Al-Ni alloys obtained by scanning Maxwell-stress microscopy as an effective tool for evaluating metal transistor gates

T Matsukawa, C Yasumuro, H Yamauchi, M Masahara, E Suzuki, S Kanemaru

APPLIED PHYSICS LETTERS 86(9) 094104-1-094104-3 2005年2月
Investigation of Accumulation-mode Vertical DG-MOSFET

Extended Abstract of SSDM 2005 586-587 2005年
Device design consideration for Vth-controllable 4-terminal DG-MOSFET

JAPANESE JOURNAL OF APPLIED PHYSICS 44(4B) 2351-2356 2005年
Electron Mobility in Multi-FinFET with a (111) Channel Surface Fabricated by Orientation-Dependent Wet Etching

MICROELECTRONIC ENGINEERING 80(6) 386-389 2005年
Fabrication and Characterization of Vertical-type, Self-aligned Asymmetric DGMOSFET

APPLIED PHYSICS LETTERS 86 1235121-1235123 2005年
A highly threshold voltage-controllable 4T FinFET with an 8.5-nm-thick Si-Fin channel

YX Liu, M Masahara, K Ishii, T Sekigawa, H Takashima, H Yamauchi, E Suzuki

IEEE ELECTRON DEVICE LETTERS 25(7) 510-512 2004年7月
Diagnostics of doping integrity in n(/)(+)p/n(+) transistor-channel structure by scanning nonlinear dielectric microscopy

T Matsukawa, C Yasumuro, M Masahara, H Tanoue, S Kanemaru

APPLIED PHYSICS LETTERS 84(16) 3169-3171 2004年4月

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