論文

査読有り
2017年

Ion Implantation after Germanidation technique for Low Thermal Budget Ge CMOS devices: from Bulk Ge to UTB-GeOI substrate

2017 INTERNATIONAL SYMPOSIUM ON VLSI TECHNOLOGY, SYSTEMS AND APPLICATION (VLSI-TSA)
  • Wen Hsin Chang
  • ,
  • Toshifumi Irisawa
  • ,
  • Hiroyuki Ishii
  • ,
  • Hiroyuki Hattori
  • ,
  • Hiroyuki Ota
  • ,
  • Noriyuki Uchida
  • ,
  • Tatsuro Maeda

記述言語
英語
掲載種別
研究論文(国際会議プロシーディングス)
出版者・発行元
IEEE

Ion implantation after germanidation (IAG) technique has been implemented for low thermal budget bulk Ge and UTB-GeOI n- and p-MOSFETs. Dopant segregation at NiGe/Ge interface by low temperature drive-in annealing has an advantage in forming an abrupt metallic source/drain (S/D) junction, which is not only effective for bulk Ge but also for UTB-GeOI substrate. IAG technique is proved to be a low thermal budget process for both Ge n- and p-MOSFETs with a high I-on-I-off ratio and low parasitic resistance.

リンク情報
Web of Science
https://gateway.webofknowledge.com/gateway/Gateway.cgi?GWVersion=2&SrcAuth=JSTA_CEL&SrcApp=J_Gate_JST&DestLinkType=FullRecord&KeyUT=WOS:000408991800049&DestApp=WOS_CPL
ID情報
  • ISSN : 1930-8868
  • ORCIDのPut Code : 45568685
  • Web of Science ID : WOS:000408991800049

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