Ishikuro, Hiroki

Last updated: May 29, 2019 at 03:45

Name	Ishikuro, Hiroki
E-mail	ishikuroelec.keio.ac.jp
URL	http://www.iskr.elec.keio.ac.jp/
Affiliation	Keio University
Section	Faculty of Science and Technology Department of Electronics and Electrical Engineering
Job title	Professor
Degree	工学(The University of Tokyo)
Research funding number	80433738

Research Areas

Electrical and electronic engineering / Electron device/Electronic equipment / LSI circuit design

Academic & Professional Experience

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Apr 1999

Mar 2006

(株)東芝 SoC研究開発センター

Apr 2006

Mar 2008

慶應義塾大学理工学部電子工学科, 専任講師

Apr 2008

Mar 2014

慶應義塾大学理工学部電子工学科, 准教授

Apr 2014

Today

慶應義塾大学理工学部電子工学科, 教授

Education

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Mar 1994

電子工学科, Faculty of Engineering, The University of Tokyo

Mar 1996

電子工学, Graduate School, Division of Engineering, The University of Tokyo

Mar 1999

電子工学専攻, Graduate School, Division of Engineering, The University of Tokyo

Committee Memberships

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Jun 2007

Today

電子情報通信学会 Editor

Sep 2006

Today

Symposium on VLSI Circuits Program commitee member

Jun 2006

Today

IEEE Solid-State Circuits Society Member

Apr 2006

Today

IEICE英文論文誌C Editor

Oct 2002

Feb 2004

JJAP SSDM特集号 Editor

Awards & Honors

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Apr 2007

磁界結合パルス伝送方式を用いた高速無線インターフェースの設計とファームウェアデバッグシステムへの応用, LSI IPデザインアワード, 財団法人電気・電子情報学術振興財団

Winner: ISHIKURO HIROKI

Published Papers

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Analysis and Techniques for Mitigating Interference From Power/Signal Lines and to SRAM Circuits in CMOS Inductive-Coupling Link for Low-Power 3-D System Integration

K. Niitsu, Y. Sugimori, Y.; Kohama, K. Osada, N. Irie, H. Ishikuro, T. Kuroda

IEEE Transactions on Very Large Scale Integration (VLSI) Systems 19(10) 1902-1907 Oct 2011 [Refereed]

Wireless proximity interfaces with a pulse-based inductive coupling technique

H. Ishikuro, T. Kuroda

IEEE Communications Magazine 48(10) 192-199 Oct 2010 [Refereed]

47% Power Reduction and 91% Area Reduction in Inductive-Coupling Programmable Bus for NAND Flash Memory Stacking

M. Saito, Y. Yoshida, N. Miura, H. Ishikuro, T. Kuroda

IEEE Transactions on Circuits and Systems I: Regular Papers 48(10) 192-199 Oct 2010 [Refereed]

Modeling and Experimental Verification of Misalignment Tolerance in Inductive-Coupling Inter-Chip Link for Low-Power 3-D System Integration

K. Niitsu, Y. Kohama, Y.Sugimori, K. Kasuga, K. Osada, N. Irie, H. Ishikuro, T. Kuroda

IEEE Transactions on Very Large Scale Integration (VLSI) Systems 18(8) 1238-1243 Aug 2010 [Refereed]

2 Gb/s 15 pJ/b/chip Inductive-Coupling Programmable Bus for NAND Flash Memory Stacking

M. Saito, Y. Sugimori, Y. Kohama, Y. Yoshida, N. Miura, H. Ishikuro, T. Sakurai, T. Kuroda

IEEE Journal of Solid-State Circuits 45(1) 134-141 Jan 2010 [Refereed]

Conference Activities & Talks

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Voltage-Boosting Wireless Power Delivery System With Fast Load Tracker by ΔΣ-Modulated Sub-Harmonic Resonant Switching

Ryota Shinoda, Kazutoshi Tomita, Yuya Hasegawa, and Hiroki Ishikuro

2012 IEEE International Solid-State Circuits Conference (ISSCC) Feb 2012 IEEE

A 0.7V 4.1mW 850Mbps/ch Inductive-Coupling Transceiver with Adaptive Pulse Width Controller in 65nm CMOS

Takeshi Matsubara, Isamu Hayashi, Abul Hasan Johari, Tadahiro Kuroda, and Hiroki Ishikuro

2012 IEEE Radio and Wireless Symposium(RWS Jan 2012 IEEE

1W 3.3V-to-16.3V Boosting Wireless Power Transfer Circuits with Vector Summing Power Controller

Kazutoshi Tomita, Ryota Shinoda, Tadahiro Kuroda, and Hiroki Ishikuro

IEEE Asian Solid-State Circuits Conference (ASSCC) Nov 2011 IEEE

A 40nm 50S/S - 8MS/S Ultra Low-Voltage SAR ADC with Timing Optimized Asynchronous Clock Generator

R.Sekimoto, A.Shikata, T.Kuroda, H.Ishikuro

37th Solid-State Circuits Conference (ESSCIRC) Sep 2011 IEEE

A 0.5V 1.1MS/sec 6.3fJ/conversion-step SAR-ADC with Tri-Level Comparator in 40nm CMOS

Akira Shikata, Ryota Sekimoto, Tadahiro Kuroda, and Hiroki Ishikuro

VLSIシンポジウム報告会 28 Jul 2011 IEEE

Teaching Experience

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ANALOGUE AND DIGITAL CIRCUITS (Keio University)
BACHELOR'S THESIS (Keio University)
CONTROL ENGINEERING (Keio University)
ELECTRONIC CIRCUIT BASIC (Keio University)
GRADUATE RESEARCH ON INTEGRATED DESIGN ENGINEERING 1 (Keio University)

Association Memberships

電子情報通信学会(476) , Symposium on VLSI Circuits(2) , IEEE Solid-State Circuits Society(2) , IEICE英文論文誌C(1)

Patents

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6859648 : 適応型イメージ除去ミキサ

2006-197571 : 半導体集積回路装置およびそれを用いた無線通信装置

宮下大輔

2006-74212 : 半導体装置

石田光一

2003-304167 : 半導体集積回路装置

濱田基嗣

2003-37442 : FMディジタル復調器