| | HOSOYA Gou Last updated: Nov 28, 2019 at 04:04 Academic & Professional Experience 2008 - 2011 Research Associate, Faculty of Science and Engineering, Waseda University Education - 2002 Department of Industrial and Management System Engineering, Faculty of Science and Engineering, Waseda University - 2004 Major in Industrial and Management Systems Engineering, Graduate School, Division of Science and Engineering, Waseda University - 2008 Major in Industrial and Management Systems Engineering, Graduate School, Division of Science and Engineering, Waseda University Committee Memberships Apr 2015 - Mar 2016 Research institute of Signal Processing (RISP) RISP International Workshop on Nonlinear Circuits and Signal Processing 2016, Conference Committee Apr 2012 - Mar 2013 Research institute of Signal Processing (RISP) RISP International Workshop on Nonlinear Circuits and Signal Processing, Conference Committee Apr 2004 - Jun 2005 The Japan Society for Management Information Conference Committee Awards & Honors Oct 2010 IEEE Information Theory Society Japan Chapter, Travel Support Award for Young Researchers Published Papers G. Hosoya and H. Yashima IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES E101-A(12) 2008-2017 Dec 2018 [Refereed] R. Shibata, G. Hosoya, and H. Yashima IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES E101-A(12) 2055-2063 Dec 2018 [Refereed] R. Shibata, G. Hosoya, and H. Yashima IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES E102-A(10) 1340-1350 Oct 2019 [Refereed] Simulation of All-Optical OR Gate Using Quantum-Dot Semiconductor Optical Amplifier K. Komatsu, G. Hosoya, and H. Yashima Proc. 2019 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing (NCSP'19) 2019 197-200 Mar 2019 [Refereed] K.Komatsu,G.Hosoya, and H.Yashima OPTICAL AND QUANTUM ELECTRONICS 51(39) 1-16 Jan 2019 [Refereed] Misc A study on decoding performance of nonbinary LDPC codes on two-dimensional array erasure model G. Hosoya Proc. of 41th Symposium on Information Theory and its Applications 7-12 Dec 2018 Joint Optimization of Protograph-Based LDPC Coded System for Position Errors in Racetrack Memories R. Shibata, G. Hosoya, and H. Yashima Proc. of 41th Symposium on Information Theory and its Applications 291-296 Dec 2018 Analysis of spatially-coupled low-density parity-check codes on two-dimensional array erasure channel G. Hosoya and H. Yashima Proc. of 40th Symposium on Information Theory and its Applications 511-516 Nov 2017 QD-SOA MZIと全光波長変換器を用いた8入力全光XOR回路 入江孝憲，細谷剛，八嶋弘幸 2013年電子情報通信学会ソサエティ大会予稿集 1(1) B12-12-B12-12 Sep 2013 QD-SOAを用いたXGM型全光NORゲート 古谷侑茉，小川顕太郎，入江孝憲，細谷剛，八嶋弘幸 2013年電子情報通信学会ソサエティ大会予稿集 1(1) B12-13-B12-13 Sep 2013 Books etc 理工系の基礎 情報工学 赤倉 貴子, 池口 徹, 谷口 行信, 浜田 知久馬, 古川 利博, 八嶋 弘幸, 池辺 淑子, 塩濱 敬之, 寒水 孝司, 立川 智章, 細谷 剛, 石井 隆稔, 奥野 貴之, 佐藤 寛之, 島田 裕, 高橋 智博, 藤原 寛太郎, 太原 育夫, 宮部 博史, 渡邉 均, 藤沢 匡哉 (Part:Contributor) 丸善出版 Apr 2018 ISBN:978-4-621-30285-9 |
Conference Activities & Talks Simulation of All-Optical OR Gate Using Quantum-Dot Semiconductor Optical Amplifier K. Komatsu, G. Hosoya, and H. Yashima 2019 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing 4 Mar 2019 A study on decoding performance of nonbinary LDPC codes on two-dimensional array erasure model G. Hosoya 41th Symposium on Information Theory and its Applications 18 Dec 2018 Joint Optimization of Protograph-Based LDPC Coded System for Position Errors in Racetrack Memories R. Shibata, G. Hosoya, and H. Yashima 41th Symposium on Information Theory and its Applications 18 Dec 2018 Multiple-input all-optical OR gate by cascaded logic gates based on quantum-dot semiconductor optical amplifier K. Komatsu, G. Hosoya, and H. Yashima Latin America & Optics and Photonics Conference 12 Nov 2018 Channel model divided into cylinder for free-space optical links in rain K. Futami, G. Hosoya, and H. Yashima 2018 International Symposium on Information Theory and its Applications 28 Oct 2018 Research Grants & Projects Design and analysis of rate-compatible error correcting codes based on sparse matrices Project Year: 2009 Construction and performance analysis low-density parity-check codes for correcting burst erasure Project Year: 2008 - 2009 |
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