Takashi Uchino

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Name
Takashi Uchino
Affiliation
Tohoku Institute of Technology
Section
Faculty of Engineering, Department of Electrical and Electronic Engineering
Job title
Professor

Research Areas

 
 

Published Papers

 
T. Koiwa, T. Uchino, V. A. Fedotov, J. Y. Ou
16th International Conference on Nanotechnology - IEEE NANO 2016   109-112   Nov 2016   [Refereed]
© 2016 IEEE. We present a simple and robust crystal growth technique, which yields large area single crystal films of silver ideally suited for fabricating plasmonic devices and high-finesse metamaterials. The low-loss silver films with thickness ...
T. Uchino, F. Shimpo, T. Kawashima, G. N. Ayre, D. C. Smith, C. H. De Groot, P. Ashburn
Applied Physics Letters   103(19)    Nov 2013   [Refereed]
A detailed study of the electrical transport properties of Pd contacted carbon nanotube (CNT)/Si heterojunctions is presented. The CNT with a diameter ranging from 1.2 to 2.0 nm on n-type Si substrates showed rectifying behavior with the ideality ...
T. Uchino, T. Uchino, G. N. Ayre, D. C. Smith, J. L. Hutchison, C. H. De Groot, P. Ashburn
Materials Research Society Symposium Proceedings   1407 197-202   Dec 2012   [Refereed]
The metal-catalyst-free growth of carbon nanotubes (CNTs) using chemical vapor deposition and the application in field-effect transistors (FETs) is presented. The CNT growth process used a 3-nm-thick Ge layer on SiO2 that was subsequently annealed...
T. Uchino, T. Uchino, E. Gili, E. Gili, L. Tan, O. Buiu, S. Hall, P. Ashburn
Semiconductor Science and Technology   27(6) 1-4   Jun 2012   [Refereed]
A vertical MOSFET (VMOST) incorporating an epitaxial channel and a drain junction in a stacked silicon-insulator structure is presented. In this device structure, an oxide layer near the drain junction edge (referred to as a junction stop) acts as...
V. A. Fedotov, V. A. Fedotov, T. Uchino, T. Uchino, T. Uchino, J. Y. Ou, J. Y. Ou
Optics Express   20(9) 9545-9550   Apr 2012   [Refereed]
We demonstrate high-finesse plasmonic metamaterial with strong resonant response in the near-IR spectral range fabricated using a thin low-loss film of gold monocrystal. The monocrystal was grown using specially formulated simplified crystal growt...
G. N. Ayre, T. Uchino, B. Mazumder, A. L. Hector, J. L. Hutchison, D. C. Smith, P. Ashburn, C. H. De Groot
Journal of Physics Condensed Matter   23(39) 1-8   Oct 2011   [Refereed]
This work examines the recent developments in non-traditional catalyst-assisted chemical vapour deposition of carbon nanotubes (CNTs) with a view to determining the essential role of the catalyst in nanotube growth. A brief overview of the techniq...
UCHINO Takashi, HUTCHISON John L., AYRE Greg N., SMITH David C., DE GROOT Kees, ASHBURN Peter
Jpn J Appl Phys   50(4,Issue 2) 1-4   Apr 2011   [Refereed]
The use of Ge nanostructures is investigated for the metal-catalyst-free growth of silica nanowires and carbon nanotubes (CNTs). Silica nanowires with diameters of 10-50nm and lengths of ≤1 μm were grown from SiGe islands, Ge dots, and Ge nanopart...
T. Uchino, G. Ayre, D. C. Smith, J. L. Hutchison, C. H. De Groot, P. Ashburn
Electrochemical and Solid-State Letters   14(4) 21-23   Feb 2011   [Refereed]
The metal-catalyst-free growth of carbon nanotubes (CNTs) using chemical vapor deposition and the application in field-effect transistors (FETs) is demonstrated. The CNT growth process used a 3-nm-thick Ge layer on SiO 2 that was subsequently anne...
K. Tanaka, K. Tanaka, E. Plum, J. Y. Ou, T. Uchino, N. I. Zheludev
Physical Review Letters   105(22) 1-227403   Nov 2010   [Refereed]
We report that hybridizing semiconductor quantum dots with plasmonic metamaterial leads to a multifold intensity increase and narrowing of their photoluminescence spectrum. The luminescence enhancement is a clear manifestation of the cavity quantu...
UCHINO Takashi, AYRE Greg N., SMITH David C., HUTCHISON John L., DE GROOT C.H., ASHBURN Peter
Jpn J Appl Phys   49(4,Issue 2) 1-4   Apr 2010   [Refereed]
Carbon nanotube (CNT) growth on HfO2is reported for the first time. The process uses a combination of Ge and Fe nanoparticles and achieves an increase in CNT density from 0.15 to 6.2 μm length/μm2compared with Fe nanoparticles alone. The synthesiz...
T. Uchino, G. N. Ayre, D. C. Smith, J. L. Hutchison, C. H. De Groot, P. Ashburn
ESSDERC 2009 - Proceedings of the 39th European Solid-State Device Research Conference   197-200   Dec 2009   [Refereed]
A carbon nanotube (CNT) growth process on HfO2 is reported for the first time for application in nano-sensors, The process uses a combination of Ge nanoparticles and ferric nitrate dispersion and achieves an increase in CNT density from 0.15 to 6....
T. Uchino, G. N. Ayre, D. C. Smith, J. L. Hutchison, C. H. De Groot, P. Ashburn
Journal of the Electrochemical Society   156(8) 144-148   Jul 2009   [Refereed]
This paper presents a complementary metal oxide semiconductor compatible method for the chemical vapor deposition of single-walled carbon nanotubes (SWNTs). The method uses Ge implantation into a SiO2 layer to create Ge nanocrystals, which are the...
Takashi Uchino, Konstantinos N. Bourdakos, Gregory N. Ayre, Cornelis H De Groot, Peter Ashburn, David C. Smith
Materials Research Society Symposium Proceedings   1081 27-32   Dec 2008   [Refereed]
A technique to synthesize high-quality single walled carbon nanotubes (SWNTs) using chemical vapour deposition (CVD) on Ge Stranski-Krastanow dots has been developed. From transmission electron microscopy and Raman measurements, the grown carbon n...
L. Tan, S. Hall, O. Buiu, M. M A Hakim, T. Uchino, P. Ashburn, W. Redman-White
ULIS 2008 - 9th International Conference on ULtimate Integration of Silicon   187-190   Aug 2008   [Refereed]
In this work we investigate the series resistances in vertical MOSFETs incorporating the fillet local oxidation (FILOX) structure that serves to reduce the gate to drain/source overlap capacitances. The series resistances are modeled analytically ...
TAN Lizhe, BUIU Octavian, HALL Stephen, GILI Enrico, UCHINO Takashi, ASHBURN Peter
Solid−State Electron   52(7) 1002-1007   Jul 2008   [Refereed]
This work addresses a fundamental problem of vertical MOSFETs, that is, inherently deep junctions that exacerbate short channel effects (SCEs). Due to the unconventional asymmetric junction depths in vertical MOSFETs, it is necessary to look separ...
M. M A Hakim, T. Uchino, W. R-White, P. Ashburn, L. Tan, O. Buiu, S. Hall
ESSDERC 2008 - Proceedings of the 38th European Solid-State Device Research Conference   95-98   Jan 2008   [Refereed]
We report a CMOS-compatible vertical MOSFET, which incorporates a frame gate architecture suitable for application in RF circuits. Fabricated surround gate vertical MOSFETs with the frame gate architecture show no degradation of short channel effe...
S. Hall, L. Tan, O. Buiu, M. M. Hakim, T. Uchino, P. Ashburn, W. Redman-White
Proceedings of the International Semiconductor Conference, CAS   2 387-396   Dec 2007   [Refereed]
We present a review of recent reports on vertical MOSFETs which includes a summary of our own research in this area. Such devices can offer a decananomeler channel length in a relaxed lithography. Furthermore, the footprint is substantially smalle...
GILI Enrico, UCHINO Takashi, AL HAKIM Mohammad M., DE GROOT C. H., BUIU Octavian, HALL Steve, ASHBURN Peter
IEEE Electron Device Lett   27(8) 692-695   Aug 2006   [Refereed]
A simple process for the fabrication of shallow drain junctions on pillar sidewalls in sub-100-nm vertical MOSFETs is described. The key feature of this process is the creation of a polysilicon spacer around the perimeter of the pillar to connect ...
GILI Enrico, KUNZ V. Dominik, UCHINO Takashi, AL HAKIM Mohammad M., DE GROOT C. H., ASHBURN Peter, HALL Stephen
IEEE Trans Electron Devices   53(5) 1080-1087   May 2006   [Refereed]
Vertical MOSFETs, unlike conventional planar MOSFETs, do not have identical structures at the source and drain, but have very different gate overlaps and geometric configurations. This paper investigates the effect of the asymmetric source and dra...
M. M A Hakim, C. H. de Groot, E. Gili, T. Uchino, S. Hall, P. Ashburn
IEEE Transactions on Electron Devices   53(4) 929-933   Apr 2006   [Refereed]
A simulation study is made of floating-body effects (FBEs) in vertical MOSFETs due to depletion isolation as the pillar thickness is reduced from 200 to 10 nm. For pillar thicknesses between 200 - 60 nm, the output characteristics with and without...
T. Uchino, C. H. De Groot, P. Ashburn, K. N. Bourdakos, D. C. Smith
ESSDERC 2006 - Proceedings of the 36th European Solid-State Device Research Conference   214-217   Jan 2006   [Refereed]
The interest in carbon nanotubes (CNTs) for electronic applications is predominantly based on the outstanding properties of single walled CNTs, which include ballistic transport and high thermal conductivity. However, there is a need to avoid the ...
T. Uchino, K. N. Bourdakos, C. H. De Groot, P. Ashburn, S. Wang, M. E. Kiziroglou, G. D. Dilliway, D. C. Smith
2005 5th IEEE Conference on Nanotechnology   2 649-652   Dec 2005   [Refereed]
A metal catalyst free direct growth process has been developed for the CVD of carbon nanotubes (CNTs) on carbon implanted SiGe islands or Ge dots on Si substrates. From TEM and Raman measurements, the fabricated CNTs are identified as single-walle...
T. Uchino, K. N. Bourdakos, C. H. De Groot, P. Ashburn, M. E. Kiziroglou, G. D. Dilliway, D. C. Smith
Applied Physics Letters   86(23) 1-233110   Jun 2005   [Refereed]
A metal-catalyst-free growth method of carbon nanotubes (CNTs) has been developed using chemical vapor deposition of CNTs on carbon-implanted SiGe islands on Si substrates. From scanning electron microscopy and Raman measurements, the fabricated C...
V. D. Kunz, V. D. Kunz, C. H. De Groot, E. Gili, T. Uchino, S. Hall, P. Ashburn
ESSCIRC 2004 - Proceedings of the 34th European Solid-State Device Research Conference   221-224   Dec 2004   [Refereed]
This paper reports electrical results on CMOS-compatible vertical transistors and logic gates with reduced overlap capacitance. It is shown that surround-gate MOSFETs produced using the fillet local oxidation process (FILOX) have lower gate/drain ...
S. Hall, D. Donaghy, O. Buiu, E. Gili, T. Uchino, V. D. Kunz, C. H. De Groot, P. Ashburn
Microelectronic Engineering   72(1-4) 230-235   Apr 2004   [Refereed]
We report simulations and experimental work relating to innovations in the area of ultra short channel vertical transistors. The use of dielectric pockets can mitigate short channel effects of charge sharing and bulk punch-through; thickened oxide...
E. Gili, V. D. Kunz, C. H. De Groot, T. Uchino, P. Ashburn, D. C. Donaghy, S. Hall, Y. Wang, P. L F Hemment
Solid-State Electronics   48(4) 511-519   Apr 2004   [Refereed]
The vertical MOSFET structure is one of the solutions for reducing the channel length of transistors under 50 nm. Surround gates can be easily realised in vertical MOSFETs which offer increased channel width per unit silicon area. In this paper, a...
Takashi Uchino, Peter Ashburn, Yukihiro Kiyota, Takeo Shiba
IEEE Transactions on Electron Devices   51(1) 14-19   Jan 2004   [Refereed]
An advanced CMOS process, which used rapid vapor-phase doping (RVD) for pMOSFETs and solid-phase diffusion (SPD) for nMOSFETs, has been developed. Using the RVD technique, a 40-nm-deep p-type extension with a sheet resistance as low as 400 Ω/sq ha...
V. Dominik Kunz, Takashi Uchino, C. H. De Groot, Peter Ashburn, David C. Donaghy, Steven Hall, Yun Wang, Peter L F Hemment
IEEE Transactions on Electron Devices   50(6) 1487-1493   Jun 2003   [Refereed]
Application of double gate or surround-gate vertical metal oxide semiconductor field effect transistors (MOSFETs) is hindered by the parasitic overlap capacitance associated with their layout, which is considerably larger than for a lateral MOSFET...
E. Gili, V. D. Kunz, C. H. De Groot, T. Uchino, D. Donaghy, S. Hall, P. Ashburn
European Solid-State Device Research Conference   533-536   Jan 2003   [Refereed]
© 2003 IEEE. The vertical MOSFET structure is one of the solutions for reducing the channel length of devices under 50 nm. Surround gate structures can be realized which offer improved short channel effects and more channel width per unit silicon ...
Takashi Uchino, Takashi Uchino, Akihiro Miyauchi, Takeo Shiba
IEEE Transactions on Electron Devices   48(7) 1406-1411   Jul 2001   [Refereed]
An advanced CMOS structure, in which a raised source/drain and contact windows formed over the field oxide, was fabricated. Ultrashallow junction formation using solid-phase diffusion from doped SiGe layers was used to fabricate MOSFETs. These MOS...
Takahiro Onai, Shinpei Tsujikawa, Takashi Uchino, Ryuta Tsuchiya, Kazuhiro Ohnishi, Hiroshi Fukuda, Dai Hisamoto, Naoki Yamamoto, Jiro Yugami, Katsuhiko Ichinose, Fumio Ootsuka
Technical Digest - International Electron Devices Meeting   937-939   Dec 1999   [Refereed]
0.1-μm CMOS devices for high-speed logic and system LSIs have been successfully achieved. The device has an SiO/SiN stacked gate dielectric with Toxinv = 2.8 nm to avoid gate direct tunneling leakage and boron penetration. It also utilizes a poly/...
Takashi Uchino, Yukihiro Kiyota, Takeo Shiba
Digest of Technical Papers - Symposium on VLSI Technology   93-94   Dec 1999   [Refereed]
We have developed an advanced 0.1 μm CMOS technology to form 39 nm deep p-type junction with a sheet resistance as low as 630 Ω/sq using two techniques in combination rapid vapor phase doping (RVD) and solid phase diffusion (SPD). These RVD- and S...
T. Yoshida, K. Yamaguchi, R. Furukawa, H. Yamamoto, T. Honma, M. Ishizaka, T. Uchino, H. Uchiyama, S. Iijima, Y. Ohji
IEEE International Symposium on Semiconductor Manufacturing Conference, Proceedings   441-444   Dec 1999   [Refereed]
The conditions of rugged Si, phosphorus doping process, Ta2O5 deposition and crystallization of amorphous Ta2O5 are optimized. Time dependent dielectric breakdown (TDDB) characteristic and characteristic of optimized Ta2O5/rugged Si capacitor syst...
ONISHI KAZUHIRO, YAMAMOTO NAOKI, UCHINO SHUN, HANAOKA YUKO, TSUCHIYA RYUTA, NONAKA YUSUKE, TABE YOSHIKAZU, UMESAWA TADAFUMI, SHIBA TAKEO
月刊Semiconductor World   18(7) 79-82-82   Jul 1999   [Refereed]
Kazuhiro Ohnishi, Naoki Yamamoto, Takashi Uchino, Yuko Hanaoka, Ryuta Tsuchiya, Yusuke Nonaka, Yoshikazu Tanabe, Tadashi Umezawa, Naoki Fukuda, Shinichiro Mitani, Takeo Shiba
Technical Digest - International Electron Devices Meeting   397-400   Dec 1998   [Refereed]
Highly reliable W/WNx/dual-polySi stacked-gate technology for fabricating 0.14-μm CMOS devices was developed. This technology uses a unique wet-hydrogen (WH) oxidation (1,2) for achieving gate edge recovery following dry etching. We eliminated gat...
Takashi Uchino, Takeo Shiba, Kazuhiro Ohnishi, Akihiro Miyauchi, Masami Nakata, Yosuke Inoue, Takaya Suzuki
Technical Digest - International Electron Devices Meeting, IEDM   479-480   Dec 1997   [Refereed]
An advanced CMOS design, where a raised source/drain and contact windows are formed over the field oxide is realized by using P-doped SiGe and B-doped Si selective epitaxial growth techniques. Excellent short-channel characteristics and reduced pa...
Kazuhiro Mochizuki, Takashi Uchino, Tohru Nakamura
Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers   36(11) 6724-6725   Nov 1997   [Refereed]
The dependence of the collector-depletion-layer transit time of npn bipolar transistors, τC, on the effective depletion-layer width, WC, was found to be well fitted by τC = Wc/υs, where υs is the electron saturation velocity, while it was not fitt...
Takeo Shiba, Masao Kendo, Takashi Uchino, Hisaya Murakoshi, Yoichi Tamaki
IEEE Transactions on Electron Devices   43(8) 1281-1285   Dec 1996   [Refereed]
The effect of rapid solid-phase epitaxy (SPE) on the current gain of in situ phosphorus-doped polysilicon-emitter (IDP) transistors has been evaluated. IDP technology is used to produce very-high-speed small-emitter bipolar transistors, which have...
Takeo Shiba, Takashi Uchino, Kazuhiro Ohnishi, Yoichi Tamaki
IEEE Transactions on Electron Devices   43(6) 889-897   Dec 1996   [Refereed]
In situ phosphorus-doped polysilicon emitter (IDP) technology for very high-speed, small-emitter bipolar transistors is studied. The device characteristics of IDP transistors are evaluated and compared with those of conventional ionimplanted polys...
T. Uchino, T. Uchino, K. Takita
Journal of Vacuum Science and Technology A: Vacuum, Surfaces and Films   14(5) 2871-2874   Sep 1996   [Refereed]
Liquid phase epitaxial (LPE) growth from Hg-rich solution is investigated in the case of HgTe-based quaternary semiconductors Hg1-x-yGdxZnyTe and Hg1-x-yCdxMnyTe and the ternary Hg1-xCdx Te. In contrast to the results for Hg1-xCdxTe, the LPE growt...
Nakamura Tohru, Shiba Takeo, Onai Takahiro, Uchino Takashi, Kiyota Yukihiro, Washio Katsuyoshi, Homma Noriyuki
IEICE transactions on electronics   78(9) 1154-1164   Sep 1995   [Refereed]
Recent high-speed bipolar technologies based on SICOS (Sidewall Base Contact Structure) transistors are reviewed. Bipolar device structures that include polysilicon are key technologies for improving circuit characteristics. As the characteristics...
Takashi Uchino, Takeo Shiba, Yukihiro Kiyota, Toshiyuki Kikuchi, Yoichi Tamaki, Atsuo Watanabe
IEEE Transactions on Electron Devices   42(3) 406-412   Jan 1995   [Refereed]
We present a detailed study of the performance of very-high-speed silicon bipolar transistors with ultra-shallow junctions formed by thermal diffusion. Devices are fabricated with double-polysilicon self-aligned bipolar technology with U-groove is...
Takashi Uchino, Takeo Shiba, Toshiyuki Kikuchi, Yoichi Tamaki, Atsuo Watanabe, Yukihiro Kiyota, Mirsuharu Honda
Technical Digest - International Electron Devices Meeting   67-70   Dec 1993   [Refereed]
A very high performance Si bipolar transistor technology has been developed. In-situ phosphorus doped polysilicon (IDP) emitter technology was used to reduce the thermal budget and emitter resistance. Very thin bases were obtained by rapid vapor-p...
K. Takita, T. Uchino, K. Masuda
Semiconductor Science and Technology   5(3S) 277-280   Dec 1990   [Refereed]
Hg1-x-yCdxMnyTe crystals have been successfully grown on CdTe substrates for the first time by the LPE method from Hg-rich solutions (x<or=0.4, y<or=0.1). LPE layers exhibit high electron Hall mobilities and excellent compositional uniformity both...
Takashi Uchino, Kôki Takita, Kohzoh Masuda
Journal of the Physical Society of Japan   58(2) 627-638   Feb 1989   [Refereed]
A systematic study of a new type of magnetophonon effect associated with a recombination process with emission of two TA phonons is carried out on Hg 1-xMnxTe for x=0.25∼1.0% and HgTe, using high-quality LPE crystals. Magnetophonon resonance recom...
TAKITA Koki, AKINAGA Hiroyuki, KATOH Hideo, UCHINO Takashi, ISHIGAKI Toru, ASANO Hajime
Japanese journal of applied physics. Pt. 2, Letters   26(8) L1323-L1325   Aug 1987   [Refereed]
Anisotropic behavior of the upper critical fields H_<c2> studied in as-sintered disk of YBa_2Cu_3O_<7-δ> and the characterization of the samples by X-ray diffraction analysis are described. Highly oriented samples with c-axis perpendicular to the ...
Takita Kôki, Ippōshi Takashi, Uchino Takashi, Gochou Tetsuo, Masuda Kohzoh
Jpn J Appl Phys   26(4) L506-L507   Apr 1987   [Refereed]
We report the results of temperature dependence of the resistivity in Y–Ba–Cu–O mixed-phase system for several samples with different composition and sintered at different temperatures. Two types of compounds were investigated, which have the nomi...
Kôki Takita, Hiroyuki Akinaga, Hideo Katoh, Takashi Uchino, Tōru Ishigaki, Hajime Asano
Japanese Journal of Applied Physics   26    Jan 1987   [Refereed]
Anisotropic behavior of the upper critical fields Hc2 studied in as-sintered disk of YBa2Cu3O7-δ and the characterization of the samples by X-ray diffraction analysis are described. Highly oriented samples with c-axis perpendicular to the disk pla...
K. Takita, T. Uchino, T. Gochou, K. Masuda
Solid State Communications   61(9) 535-538   Jan 1987   [Refereed]
A new type of magnetophonon effects, i.e. the magnetophonon resonance recombination with two TA-phonon emission was investigated in Hg1-xMnxTe with x-value of about 0.5% by using high quality LPE crystals. Several peaks were observed in the second...
Kôki Takita, Takashi Ippōshi, Takashi Uchino, Tetsuo Gochou, Kohzoh Masuda
Japanese Journal of Applied Physics   26    Jan 1987   [Refereed]
We report the results of temperature dependence of the resistivity in Y-Ba-Cu-O mixed-phase system for several samples with different composition and sintered at different temperatures. Two types of compounds were investigated, which have the nomi...
Takita Kôki, Akinaga Hiroyuki, Katoh Hideo, Uchino Takashi, Ishigaki T\={o}ru, Asano Hajime
Japanese Journal of Applied Physics   26(8) L1323-L1325   1987   [Refereed]
Anisotropic behavior of the upper critical fields Hc2 studied in as-sintered disk of YBa2Cu3O7−δ and the characterization of the samples by X-ray diffraction analysis are described. Highly oriente...
Takita Kôki, Ipp\={o}shi Takashi, Uchino Takashi, Gochou Tetsuo, Masuda Kohzoh
Japanese Journal of Applied Physics   26(4) L506-L507   1987   [Refereed]
We report the results of temperature dependence of the resistivity in Y–Ba–Cu–O mixed-phase system for several samples with different composition and sintered at different temperatures. Two types of compounds were investigated, which have the nomi...
K. Takita, T. Uchino, T. Ipposhi, K. Masuda
Solid State Communications   56(7) 603-606   Jan 1985   [Refereed]
Single crystals of HgTe and Hg1-xMnxTe were grown on CdTe-substrates from the Hg-solution by lowering the temperature from 350 to 320°C in the sealed ampules. High quality LPE crystals were obtained by this method. In the semimagnetic semiconducto...

Conference Activities & Talks

 
大黒厚樹, 石田凌脩, 内野俊
応用物理学会秋季学術講演会講演予稿集(CD-ROM)   25 Aug 2017   
志賀佳菜子, 竹澤政記, 菅原健太, 尾辻泰一, 内野俊
応用物理学会秋季学術講演会講演予稿集(CD-ROM)   25 Aug 2017   
小岩匡, FEDOTOV V. A., OU J. Y., 内野俊
応用物理学会秋季学術講演会講演予稿集(CD-ROM)   1 Sep 2016   
小岩匡, FEDOTOV V.A., OU J.Y., 内野俊
応用物理学会春季学術講演会講演予稿集(CD-ROM)   3 Mar 2016   
Fedotov Vassili, Ou Jun-Yu
Tohoku-Section Joint Convention Record of Institutes of Electrical and Information Engineers, Japan   2016   

Research Grants & Projects

 
Nanostructured Photonic Metamaterials
EPSRC: Standard Grant
Project Year: 2010 - 2015    Investigator(s): N. I. Zheludev,
Nanostructured photonic metamaterials
Project Year: 2011   
Devices using carbon nanomaterials and nanowires
Project Year: 2011   
Feasibility of Novel Deca-Nanometer Vertical MOSFETs for Low-Cost Radio Frequency Application
EPSRC: Standard Grant
Project Year: 2007 - 2010    Investigator(s): P. Ashburn
Metal-Free Carbon Nanotube Growth for Nanoelectronics Application
EPSRC: Standard Grant
Project Year: 2006 - 2010    Investigator(s): Takashi Uchino