KASAHARA, Hironori


KASAHARA, Hironori

J-GLOBAL         Last updated: Oct 10, 2019 at 02:49
 
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Name
KASAHARA, Hironori
URL
http://www.kasahara.cs.waseda.ac.jp/kasahara.html.ja
Affiliation
Waseda University
Section
Faculty of Science and Engineering School of Fundamental Science and Engineering
Job title
Professor
Degree
Doctor Engineering
Research funding number
30152622

Academic & Professional Experience

 
1983
   
 
Res. Assoc.(Waseda)
 
1985
   
 
Visiting Scholar (Univ. California at Berkeley)
 
1986
   
 
Assist. Prof.(Waseda Univ.)
 
1987
   
 
Department of Computer Science and Engineering, Prof.(Waseda Univ. )
 
1988
   
 
Assoc. Prof.(Waseda Univ.)
 

Education

 
 
 - 
1980
Department of Electrical Engineering, School of Science and Engineering, Waseda University
 
 
 - 
1985
Department of Computer Science and Engineering, Waseda University
 

Committee Memberships

 
Apr 1986
 - 
Mar 1998
The Institute of Electrical Engineers of Japan  Secretary, Committee on Information Technology
 
Apr 1988
 - 
Mar 1991
The Institute of Electrical Engineers of Japan  SIG. on Simulation Technology
 
Jun 1988
 - 
May 1990
Information Processing Society of Japan  Literature and News Committee in IPSJ Magazine
 
Jun 1990
 - 
May 1993
Information Processing Society of Japan  IPSJ Magazine Editorial Board
 
1991
 - 
1993
The Institute of Electronics, Information and Communication Engineers  Secretary, SIG. on Computer Systems
 

Awards & Honors

 
Jun 2015
Information Processing Society of Japan Fellow Award
 
Apr 2014
Prize for Science and Technology (Research Category),The Commendation for Science and Technology by the Minister of Education, Culture, Sports, Science and Technology
 
Feb 2010
IEEE Computer Society Golden Core Member
 
Oct 2008
Intel 2008 Asia Academic Forum Best Research Award
 
Jul 2008
2008 LSI Of-The-Year Second Prize
 

Published Papers

 
Code Generating Method with Profile Feedback for Reducing Compilation Time of Automatic Parallelizing Compiler
Rina Fujino, Jixin Han, Mamoru Shimaoka, Hiroki Mikami, Takahiro Miyajima, Moriyuki Takamura, Keiji Kimura, Hironori Kasahara
Information Processing Society of Japan, Special Interest Group on System Architecture (ARC217@ETNET2017)      Mar 2017
Parallel Processing of Automobile Real-time Control on Multicore System with Multiple Clusters
Jin Miyata,Mamoru Shimaoka, Hiroki Mikami, Hirofumi Nishi, Hitoshi Suzuki, Keiji Kimura, Hironori Kasahara
Information Processing Society of Japan, Special Interest Group on System Architecture (ARC217@ETNET2017)      Mar 2017
Hierarchical Interconnection Network Extension for Gen 5 Simulator Considering Large Scale Systems
Tatsuya Onoguchi, Ayane Hayashi, Katsuyuki Utaka, Yuichi Matsushima,Keiji Kimura, Hironori Kasahara
Information Processing Society of Japan, Special Interest Group on System Architecture (ARC217@ETNET2017)      Mar 2017
Reducing Parallelizing Compilation Time by Removing Redundant Analysis
Jixin Han、Rina Fujino, Ryota Tamura, Mamoru Shimaoka, Hiroki Mikami, Moriyuki Takamura, Sachio Kamiya, Kazuhiko Suzuki, Takahiro Miyajima, Keiji Kimura, Hironori Kasahara
Systems, Programming, Languages and Applications: Software for Humanity (SPLASH)      Oct 2016   [Refereed]
Accelerating Multicore Architecture Simulation Using Application Profile
Keiji Kimura, Gakuho Taguchi, Hironori Kasahara
2016 IEEE 10th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC)      Sep 2016   [Refereed]

Books etc

 
IEEE CS 2022 Report
Hasan Alkhatib, Paolo Faraboschi, Eitan Frachtenberg, Hironori Kasahara, Danny Lange, Phil Laplante, Arif Merchant, Dejan Milojicic, and Karsten Schwan
IEEE Computer Society   Sep 2014   
並列処理技術
笠原 博徳
情報処理学会50年のあゆみ,pp.195-198   Oct 2010   
Parallel Processing Technology
Hironori Kasahara
History of Information Process Society of Japan 50years , pp.195-198   Oct 2010   
Embedded Multi-core Handbook (Technology and Application)
Hironori Kasahara
JEITA   Feb 2010   
Embedded Multi-core Handbook (Basic)
Hironori Kasahara
JEITA   Feb 2010   

Conference Activities & Talks

 
Cool Chips, Low Power Multicores, Open the Way to the Future, Panel Discussion [Invited]
Hironori Kasahara
IEEE Symposium on Low-Power and High-Speed Chips(COOL CHIPS 20)   Apr 2017   
2017 COOL Chips 20 Cerebration for the 20th Anniversary of IEEE Symposium on Low-Power and High-Speed Chips, Opening Address [Invited]
Hironori Kasahara
IEEE Symposium on Low-Power and High-Speed Chips(COOL CHIPS 20)   Apr 2017   
3rd IEEE PCSC '17(IEEE Pakistan Computer Society Congress) [Invited]
Hironori Kasahara
IEEE Computer Society Karachi Section   Apr 2017   
Integrated Development of Parallelizing and Power Reducing Compiler and Multicore Architecture for HPC to Embedded Applications [Invited]
Hironori Kasahara
SISA (International Workshop A Strategic Initiative of Computing Systems and Applications)   Jan 2017   
Elected IEEE Computer Society President 2018 and Research and Development of High-performance and Low power Multicores [Invited]
Hironori Kasahara
IEEE CSJapan Chapter Young Author Award 2016   Dec 2016   

Research Grants & Projects

 
Heterogeneous multi-core technology for information appliances
Project Year: 2007 - 2009
Research and Development of Real-Time Multi-Core Technology for Information Appliances
Project Year: 2005 - 2007
Automatic Parallelizing Compiler Cooperative Chip Multiprocessor
Project Year: 2004 - 2006
Interactive Entertainment
Project Year: 2002 - 2006
Parallelizing Compiler Cooperative Single Chip Multiprocessor
Project Year: 2000 - 2004

Patents

 
6335253 : マルチプロセッサシステム
笠原 博徳, 木村 啓二
6319880 : 並列性の抽出方法及びプログラムの作成方法
木村 啓二, 林 明宏, 笠原 博徳, 見神 広紀, 金羽木 洋平, 梅田 弾
6103647 : プロセッサシステム及びアクセラレータ
木村 啓二, 笠原 博徳
6018022 : 並列化コンパイル方法、並列化コンパイラ、並列化コンパイル装置、及び、車載装置
笠原 博徳, 木村 啓二, 林 明宏, 見神 広紀, 梅田 弾, 金羽木 洋平
5283128 : プロセッサによって実行可能なコードの生成方法、記憶領域の管理方法及びコード生成プログラム
笠原 博徳, 木村 啓二, 間瀬 正啓