KANASUGI Akinori

J-GLOBAL         Last updated: Dec 13, 2018 at 03:04
 
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Name
KANASUGI Akinori
Affiliation
Tokyo Denki University
Section
School of Engineering Department of Electronic Engineering
Job title
Professor

Research Areas

 
 

Academic & Professional Experience

 
Apr 1985
 - 
Mar 1990
Fujitsu Laboratories Ltd. Semiconductor Devices Lab. Researcher
 
Apr 1990
 - 
Aug 2002
Research Assistant
 
Apr 1999
 - 
Feb 2000
Researcher
 
Sep 2002
 - 
Sep 2006
Associate Professor
 

Education

 
Apr 1976
 - 
Mar 1981
Tokyo National College of Technology
 
Apr 1981
 - 
Mar 1983
Faculty of Engineering, Saitama University
 
Apr 1983
 - 
Mar 1985
Saitama University
 

Published Papers

 
An FPGA Implementation of Template Matching Processor
Y Matsui, A. Tsukahara and A. Kanasugi
2017 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing (NCSP'1   209-212   Mar 2017   [Refereed]
Design of Linear Phase FIR Filter using Real Coded Genetic Algorithm Processor based on FPGA
A. Tsukahara and A. Kanasugi
2017 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing (NCSP'1   105-108   Mar 2017   [Refereed]
An Architecture of Real Coded Genetic Algorithm Processor
Akihiko Tsukahara, Akinori Kanasugi
IEEJ Transaction on Electronics, Information and Systems   136(11) 1586-1595   Nov 2016   [Refereed]
Design of a ZNCC template matching processor based on FSBMA
◎Y. Matsui, A. Tsukahara and A. Kanasugi
Proc. of 2016 Int. Symp. on Artificial Life and Robotics      Jan 2016
Design of a Real Coded GA Processor
◎A. Tsukahara and A. Kanasugi
Proceedings of the 7th International Joint Conference on Computational Intelligence (IJCCI 2015)   1 334-339   Nov 2015   [Refereed]

Misc

 
Integrated Machine Code Monitor on FPGA
Hiroaki KANEKO, Akinori KANASUGI
IEICE Technical Report      Jan 2018
Optimal Design of FIR filter using a Real Coded Genetic Algorithm Processor
   Jan 2017
Proposal of Processor Enabling to Start-Up Internal Modules Distributed Energy Consumption
   Jan 2017
Fundamental Research on Dynamic Reconfigurable Integrated Circuits
Y. Hayakawa
(28) 137-142   Aug 2009

Books etc

 
A Design of Architecture for Rough Set Processor
ed. by M. Inuiguchi et al (Part:Joint Work)
2002   ISBN:3-540-00574-9
A Genetic Algorithm for Switchbox Routing Problem
T. Shimayama, N. Nakaya, T. Iizuka (Part:Joint Work)
Jan 1995   ISBN:3-540-64655-8

Teaching Experience

 

Research Grants & Projects

 
Research of multifunctional electronic circuit board with high reliability
Project Year: Jan 2009 - Dec 2009