Misc.

Jul 6, 2001

Power Current Simulation for EMC Design of LSI

IEICE technical report. Electromagnetic compatibility
  • TAKAYAMA Keisuke
  • ,
  • KINOSHITA Tomohiro
  • ,
  • MATSUNAGA Shigeki
  • ,
  • WANG Zhi Liang
  • ,
  • TOYOTA Yoshitaka
  • ,
  • WADA Osami
  • ,
  • KOGA Ryuji
  • ,
  • FUKUMOTO Yukihiro
  • ,
  • SHIBATA Osamu

Volume
101
Number
178
First page
73
Last page
78
Language
Japanese
Publishing type
Publisher
The Institute of Electronics, Information and Communication Engineers

High frequency currents flowing from power terminals of an IC/LSI onto power/ground planes of a digital printed circuit board can generate a great amount of electromagnetic noise. A power current model of an IC/LSI for EMI simulation was proposed in our previous studies. This report describes the mechanism and quantitative effect of reducing high frequency currnts on power/ground terminals by embedding a decoupling inductor and/or a bypass capacitor in an IC/LSI package. Furthermore, the above internal decoupling effect on suppressing EMI radiated from the board is verfied in both the simulations and measurements.

Link information
CiNii Articles
http://ci.nii.ac.jp/naid/110003191182
CiNii Books
http://ci.nii.ac.jp/ncid/AN10013108
URL
http://id.ndl.go.jp/bib/5872881
ID information
  • ISSN : 0913-5685
  • CiNii Articles ID : 110003191182
  • CiNii Books ID : AN10013108

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